IP Library Granted Patent US 7,683,473
Granted Patent B2
US 7,683,473 · App. 11/540,034 · Granted Mar 23, 2010

Semiconductor device, fabrication method therefor, and film fabrication method

Assignee: Spansion LLC
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Quick Facts
Patent No.
US 7,683,473
App. No.
11/540,034
Granted
Mar 23, 2010
Kind
B2
Abstract

The present invention provides a semiconductor device, a fabrication method therefor, and a film fabrication method, the semiconductor device including a first substrate (e.g., a semiconductor chip), an anisotropic conductive film that is provided on the first substrate and has a wiring pattern having at least a portion providing conduction through the anisotropic conductive film, and a second substrate (semiconductor chip) provided on the anisotropic conductive film and coupled to the first substrate via the portion providing conduction through the anisotropic conductive film. According to the present invention, it is possible to provide a semiconductor device, a fabrication method therefor, and a film fabrication method, by which production costs can be reduced in electrically coupling different positions in upper and lower substrates.

Claims (71)

1. A semiconductor device comprising;

a first substrate having a first via hole;

an anisotropic conductive film provided on the first substrate;

a second substrate having a second via hole provided on the anisotropic conductive film; and

a wiring pattern formed in the anisotropic conductive film for providing a conduction of the first via hole of the first substrate and the second via hole of the second substrate, the wiring pattern formed in a region of the anisotropic conductive film exposed to a laser beam.

2. The semiconductor device as claimed in claim 1 , wherein at least one of the first substrate and the second substrate has a metal protruding portion and is connected to the anisotropic conductive film via the metal protruding portion.

3. The semiconductor device as claimed in claim 2 , wherein the metal protruding portion mainly includes any one of gold, copper, nickel and solder.

4. The semiconductor device as claimed in claim 1 , further comprising an insulating film provided between the anisotropic conductive film and at least one of the first substrate and second substrate.

5. The semiconductor device as claimed in claim 1 , further comprising a seal resin portion sealing at least one of the first substrate and the second substrate.

6. The semiconductor device as claimed in claim 1 , wherein at least one of the first substrate and second substrate include a semiconductor substrate.

7. The semiconductor device as claimed in claim 1 , wherein the anisotropic conductive film has an insulating substance including conductive particles, the conductive particles electrically coupled to each other in the wiring pattern.

8. The semiconductor device as claimed in claim 7 , wherein each of the conductive particles is an insulating particle covered with a metal film.

9. The semiconductor device as claimed in claim 8 , wherein the insulating particle includes any one of polyimide resin, epoxy resin, silicon resin, and polyethylene terephthalate resin.

10. The semiconductor device as claimed in claim 7 , wherein each of the conductive particles is a metal particle covered with a metal film.

11. The semiconductor device as claimed in claim 10 , wherein the metal particle includes copper, and the metal film includes solder.

12. The semiconductor device of claim 1 , wherein the wiring pattern is formed only on a top surface or a bottom surface of the anisotropic conductive film.

13. A method of fabricating a semiconductor device comprising:

forming, on a first substrate having a first via hole, an anisotropic conductive film;

forming, on the anisotropic conductive film, a second substrate having a second via hole;

forming a wiring pattern in the anisotropic conductive film to provide a conduction of the first via hole of the first substrate and the second via hole of the second substrate; and

exposing a region of the anisotropic conductive film to a laser beam so that the wiring pattern is formed in the region of the anisotropic conductive film exposed to the laser beam.

14. The method as claimed in claim 13 , wherein the anisotropic conductive film has an insulating substance including conductive particles; and wherein the forming the wiring pattern includes electrically coupling the conductive particles to each other by exposing the conductive particles to the laser beam.

15. The method of fabricating a semiconductor device of claim 13 , wherein the wiring pattern is formed on a top surface of the anisotropic conductive film by setting the focus of the laser beam to the top surface of the anisotropic conductive film.

16. The method of fabricating a semiconductor device of claim 13 , wherein the wiring pattern is formed on a bottom surface of the anisotropic conductive film by setting the focus of the laser beam to the bottom surface of the anisotropic conductive film.

17. The method of fabricating a semiconductor device of claim 13 , wherein the wiring pattern is formed in the anisotropic conductive film by setting the focus of the laser beam to the center of the anisotropic conductive film.

18. A wireless communications device, said wireless communications device comprising:

a flash memory comprising:

a first substrate;

an anisotropic conductive film provided on the first substrate;

a second substrate having a second via hole provided on the anisotropic conductive film; and

a wiring pattern for providing a conduction of the first via hole of the first substrate and the second via hole of the second substrate, the wiring pattern formed in a region of the anisotropic conductive film exposed to a laser beam;

a processor;

a communications component;

a transmitter circuit;

a receiver circuit; and

an antenna connected to the transmitter circuit and the receiver circuit.

19. The wireless communications device of claim 18 , wherein said flash memory is NAND flash memory.

20. The wireless communications device of claim 18 , wherein said flash memory is NOR flash memory.

21. The wireless communications device of claim 18 , wherein said flash memory utilizes mirrorbits technology.

22. A computing device comprising:

a processor:

an input component;

an output component;

a memory comprising:

a volatile memory; and

a flash memory comprising:

a first substrate having a first via hole;

an anisotropic conductive film provided on the first substrate;

a second substrate having a second via hole provided on the anisotropic conductive film; and

a wiring pattern for providing a conduction of the first via hole of the first substrate and the second via hole of the second substrate, the wiring pattern formed in a region of the anisotropic conductive film exposed to a laser beam.

23. The computing device of claim 22 , wherein said computing device is a personal computer (PC).

24. The computing device of claim 22 , wherein said computing device is a personal digital assistant (PDA).

25. The computing device of claim 22 , wherein said computing device is a gaming system.

26. A portable media player comprising:

a processor:

a cache;

a user input component;

a coder-decoder component: and

a memory comprising:

a flash memory comprising:

a first substrate having a first via hole;

an anisotropic conductive film provided on the first substrate;

a second substrate having a second via hole provided on the anisotropic conductive film; and

a wiring pattern for providing a conduction of the first via hole of the first substrate and the second via hole of the second substrate, the wiring pattern formed in a region of the anisotropic conductive film exposed to a laser beam.

27. The portable media player of claim 26 , wherein said portable media player is a portable music player.

28. The portable media player of claim 26 , wherein said portable media player is a portable video player.

29. A semiconductor device comprising:

a first substrate having a first via hole;

an anisotropic conductive film provided on the first substrate;

a second substrate having a second via hole provided on the anisotropic conductive film, the second via hole misaligned with the first via hole; and

a wiring pattern for providing a conduction of the first via hole of the first substrate and the second via hole of the second substrate, the wiring pattern formed in a region of the anisotropic conductive film exposed to a laser beam.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036043/0013 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2006
From: KASAI, JUNICHI; MEGURO, KOUICHI; ONODERA, MASANORI
To: SPANSION LLC.
Reel/Frame 018600/0654 →
Continuity (2)
Continuation In Part PCTJP200501781600 · Sep 28, 2005
Related Publication 20070105304A1 · May 10, 2007