IP Library Granted Patent US 7,476,563
Granted Patent B2
US 7,476,563 · App. 11/561,241 · Granted Jan 13, 2009

Method of packaging a device using a dielectric layer

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Quick Facts
Patent No.
US 7,476,563
App. No.
11/561,241
Granted
Jan 13, 2009
Kind
B2
Abstract

A method is for packaging a first device having a first major surface and a second major surface. An encapsulant is formed over a second major surface of the first device and around sides of the first device. This leaves the first major surface of the first device exposed. A first dielectric layer is formed over the first major surface of the first device. a side contact interface is formed having at least a portion over the first dielectric layer. The encapsulant is cut to form a plurality of sides of encapsulant. A portion of the encapsulant is removed along a first side of the plurality of sides to expose a portion of the side contact interface along the first side of the plurality of sides.

Claims (56)

1. A method of packaging a first device having a first major surface and a second major surface, comprising:

forming an encapsulant over a second major surface of the first device and around sides of the first device and leaving the first major surface of the first device exposed;

forming a first dielectric layer over the first major surface of the first device;

forming a side contact interface having at least a portion over the first dielectric layer;

cutting the encapsulant to form a plurality of sides of the encapsulant; and

removing a portion of the encapsulant along a first side of the plurality of sides to expose a portion of the side contact interface along the first side of the plurality of sides.

2. The method of claim 1 , further comprising:

applying tape to the first major surface prior to the step of forming the encapsulant; and

removing the tape prior to the step of forming the first dielectric layer.

3. The method of claim 1 , further comprising:

forming a first via in the first dielectric layer to a first contact of the first device;

wherein the step of forming the side contact interface is further characterized by the side contact interface comprising a first interconnect between the first via and the first side of the plurality of sides.

4. The method of claim 3 , wherein the step of forming the side contact interface is further characterized by the side contact interface further comprising a second device between the interconnect and the first side of the plurality of sides.

5. The method of claim 4 , wherein the step of forming the side contact interface is further characterized by:

forming a second via through the first dielectric layer between a first contact of the second device and the first interconnect.

6. The method of claim 4 , wherein the step of forming the side contact interface is further characterized by the second device being formed over the first dielectric layer.

7. The method of claim 4 , wherein the step of forming the first dielectric layer is further characterized as being formed over the second device.

8. The method of claim 1 , wherein the step of forming the side contact interface is further characterized by:

forming a first via through the first dielectric layer between a first contact of a second device and a first interconnect between the via and the first side of the plurality of sides.

9. The method of claim 1 , wherein the step of forming the encapsulant is further characterized by the encapsulant being epoxy-based and heat curable.

10. The method of claim 1 , wherein the step of forming the first dielectric layer is further characterized by the first dielectric layer being a polymer dielectric.

11. A method, comprising:

applying tape to a first major surface of a first device;

forming an encapsulant that is over a second major surface of the first device and around sides of the first device for providing physical support for handling the first device;

removing the tape from the first major surface after forming the encapsulant;

depositing a first dielectric layer that is a polymer dielectric over the first major surface of the first device;

forming a side contact interface having at least a portion over the first dielectric layer;

cutting the encapsulant to form a plurality of sides of the encapsulant; and

removing a portion of the encapsulant along a first side of the plurality of sides to expose a portion of the side contact interface along the first side of the plurality of sides.

12. The method of claim 11 , wherein the step of applying tape is further characterized by the first device having a contact, further comprising:

etching a via-hole through the first dielectric layer; and

forming a conductor in the via-hole, wherein the via contacts the side contact interface and the first contact of the first device.

13. The method of claim 11 , wherein the step of forming a side contact interface is further characterized by the side contact interface comprising a second device connected between the via and the first side of the plurality of sides.

14. The method of claim 13 , wherein the step of removing a portion of the encapsulant is further characterized by exposing a contact of the second device.

15. The method of claim 11 , wherein:

the step of forming a side contact interface is further characterized by the side contact interface comprising an interconnect layer extending to the first side; and

the step of removing a portion of the encapsulant is further characterized by exposing an end portion of the interconnect layer.

16. The method of claim 11 , further comprising forming a second dielectric layer over the side contact interface.

17. The method, of claim 11 , wherein the step of applying tape to the first major surface of a first device is further characterized by the first device being a semiconductor die.

18. A method, comprising:

applying a tape having adhesive properties to a first major surface of a first device and a first major surface of a second device, wherein the first device has a first contact along the first major surface and the second device has a first contact and a second contact;

forming an encapsulant over a second major surface of the first device and second major surface of the second device and along sides of the first and second devices wherein the encapsulant has a first major surface over the second major surfaces of the first and second devices and a second major surface opposite the first major surface;

removing the tape;

forming a first dielectric layer over the first major surface of the first device and the first major surface of the second device;

forming a first via-hole and a second via-hole in the first dielectric layer;

forming a first conductor from the first contact of the first device to the first contact of the second device through the first and second via-holes;

cutting the encapsulant to form a plurality of sides of encapsulant between the first and second major surfaces of the encapsulant; and

removing a portion of the encapsulant along a first side of the plurality of sides to expose the second contact of the second device along the first side of the plurality of sides.

19. The method of claim 18 , wherein the first device is a semiconductor die and the second device comprises a resistor.

20. The method of claim 18 , wherein the first device has a second contact, further comprising:

forming a third device over the first dielectric layer, wherein the third device has a first contact and a second contact;

forming a second dielectric layer over the first dielectric layer and the third device;

forming a third via through the first dielectric layer;

forming a fourth via through the second dielectric layer; and

forming a second conductor from the second contact of the first device to the first contact of the third device through the third and fourth vias;

wherein the step of removing a portion of the encapsulant is further characterized as exposing second contact of the third device along the first side of the encapsulant.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2018
From: NXP USA, INC.
To: VLSI TECHNOLOGY LLC
Reel/Frame 045084/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0793 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded May 19, 2009
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 022703/0405 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2006
From: MANGRUM, MARC A.; BURCH, KENNETH R.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 018536/0098 →