IP Library Granted Patent US 7,420,488
Granted Patent B2
US 7,420,488 · App. 11/672,648 · Granted Sep 2, 2008

Apparatus and method for setting filter coefficient, and recording medium having a program recorded thereon

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Quick Facts
Patent No.
US 7,420,488
App. No.
11/672,648
Granted
Sep 2, 2008
Kind
B2
Abstract

Echo preventing circuit includes first and second FIR filters. The outputs of the first and second FIR filters are converted into first and second analog signals. An input/output terminal outputs the first analog signal or receives a third analog signal. An AD converter converts an analog signal obtained by subtracting the second analog signal from a signal formed by combining the first analog signal and the third analog signal. A response signal acquiring unit acquires a first response signal from an output of the first FIR filter to an output of the AD converter. A filter coefficient setting unit sets the filter coefficients of the second FIR filter based on the first response signal and sets the filter coefficients of the first FIR filter based on second response signal of a section from and output of the second FIR filter to an output of the AD converter.

Claims (103)

1. A filter coefficient setting apparatus that sets filter coefficients of an echo preventing circuit having

a first Finite Impulse Response filter that is inputted with a first digital signal and that outputs a second digital signal,

a second Finite Impulse Response filter that is inputted with the first digital signal at the same time that the first Finite Impulse Response filter is inputted with the first digital signal, and that outputs a third digital signal,

a first DA converter that converts the second digital signal into a first analog signal and outputs the first analog signal,

a second DA converter that converts the third digital signal into a second analog signal and outputs the second analog signal,

an input/output terminal that outputs the first analog signal or that is inputted with a third analog signal,

a subtracting circuit that outputs a fourth analog signal obtained by subtracting the second analog signal from a signal formed by combining the first analog signal and the third analog signal, and

an AD converter that converts the analog signal outputted from the subtracting circuit into a digital signal and outputs the digital signal, the apparatus comprising:

a response signal acquiring unit that acquires a first response signal of a section from an output of the first Finite Impulse Response filter to an output of the AD converter by generating a first signal, adjusts the magnitude of the first signal in response to the magnitude of the first response signal, and acquires again the first response signal;

a filter coefficient setting unit that sets the filter coefficients of the second Finite Impulse Response filter based on the first response signal acquired again and sets the filter coefficients of the first Finite Impulse Response filter based on a second response signal of a section from an output of the second Finite Impulse Response filter to an output of the AD converter; and

a signal level adjusting unit that adjusts the signal levels of the first and the second analog signals based on the amount by which the level of the first signal is to be adjusted such that the fourth analog signal is a signal obtained by removing or attenuating the first analog signal from a signal formed by combining the first analog signal and the third analog signal.

2. The filter coefficient setting apparatus of claim 1 , wherein

the response signal acquiring unit acquires the second response signal by generating a second signal, adjusts the magnitude of the second response signal in response to the magnitude of the second response signal, and acquires again the second response signal, and wherein

the filter coefficient setting unit sets the filter coefficients of the first Finite Impulse Response filter based on the second response signal acquired again.

3. The filter coefficient setting apparatus of claim 1 , wherein

the signal level adjusting unit adjusts the signal levels of the second and the third digital signals based on the amount by which the level of the first signal is to be adjusted and, thereby, the fourth analog signal is a signal obtained by removing or attenuating the first analog signal from a signal formed by combining the first analog signal and the third analog signal.

4. The filter coefficient setting apparatus of claim 3 , wherein

the filter coefficient setting unit sets a phase-inverted signal of the second response signal as the filter coefficients of the first Finite Impulse Response filter, wherein

the response signal acquiring unit acquires the first response signal employing the magnitude of the second signal that is employed when the second response signal is acquired as the magnitude of the first signal, adjusts the magnitude of the first signal in response to the magnitude of the first response signal, and acquires again the first response signal, wherein

the filter coefficient setting unit sets the first response signal acquired again as the filter coefficients of the second Finite Impulse Response filter, and wherein

the signal level adjusting unit adjusts the signal level of the second or the third digital signal based on the amount by which the first signal is to be adjusted.

5. The filter coefficient setting apparatus of claim 3 , wherein

the filter coefficient setting unit sets the second response signal as the filter coefficients of the first Finite Impulse Response filter, wherein

the response signal acquiring unit acquires the first response signal employing the magnitude of the second signal that is employed when the second response signal is acquired as the magnitude of the first signal, adjusts the magnitude of the first signal in response to the magnitude of the first response signal, and acquires again the first response signal, wherein

the filter coefficient setting unit sets a phase-inverted signal of the first response signal acquired again as the filter coefficients of the second Finite Impulse Response filter, and wherein

the signal level adjusting unit adjusts the signal level of the second or the third digital signal based on the amount by which the first signal is to be adjusted.

6. The filter coefficient setting apparatus of claim 2 , wherein

the signal level adjusting unit adjusts the signal levels of the second or the third digital signals based on the amount by which the level of the second signal is to be adjusted and, thereby, the fourth analog signal is a signal obtained by removing or attenuating the first analog signal from a signal formed by combining the first analog signal and the third analog signal.

7. The filter coefficient setting apparatus of claim 6 , wherein

the filter coefficient setting unit sets a phase-inverted signal of the first response signal as the filter coefficients of the second Finite Impulse Response filter, wherein

the response signal acquiring unit acquires the second response signal employing the magnitude of the first signal that is employed when the first response signal is acquired as the magnitude of the second signal, adjusts the magnitude of the second signal in response to the magnitude of the second response signal, and acquires again the second response signal, wherein

the filter coefficient setting unit sets the second response signal acquired again as the filter coefficients of the first Finite Impulse Response filter, and wherein

the signal level adjusting unit adjusts the signal level of the second or the third digital signal based on the amount by which the second signal is to be adjusted.

8. The filter coefficient setting apparatus of claim 6 , wherein

the filter coefficient setting unit sets the first response signal as the filter coefficients of the second Finite Impulse Response filter, wherein

the response signal acquiring unit acquires the second response signal employing the magnitude of the first signal that is employed when the first response signal is acquired as the magnitude of the second signal, adjusts the magnitude of the second signal in response to the magnitude of the second response signal, and acquires again the second response signal, wherein

the filter coefficient setting unit sets a phase-inverted signal of the second response signal acquired again as the filter coefficients of the first Finite Impulse Response filter, and wherein

the signal level adjusting unit adjusts the signal level of the second or the third digital signal based on the amount by which the second signal is to be adjusted.

9. The filter coefficient setting apparatus of claim 1 , wherein

the signal level adjusting unit varies the first response signal acquired again based on the amount by which the first signal is to be adjusted, and wherein

the filter coefficient setting unit sets the varied first response signal as the filter coefficients of the second Finite Impulse Response filter and, thereby, causes the fourth analog signal to be a signal obtained by removing or attenuating the first analog signal from a signal formed by combining the first analog signal and the third analog signal.

10. The filter coefficient setting apparatus of claim 9 , wherein

the filter coefficient setting unit sets a phase-inverted signal of the second response signal as the filter coefficients of the first Finite Impulse Response filter, wherein

the response signal acquiring unit acquires the first response signal employing the magnitude of the second signal that is employed when the second response signal is acquired as the magnitude of the first signal, adjusts the magnitude of the first signal in response to the magnitude of the first response signal, and acquires again the first response signal, wherein

the signal level adjusting unit varies the first response signal acquired again based on the amount by which the first signal is to be adjusted, and wherein

the filter coefficient setting unit sets the varied first response signal as the filter coefficients of the second Finite Impulse Response filter.

11. The filter coefficient setting apparatus of claim 9 , wherein

the filter coefficient setting unit sets the second response signal as the filter coefficients of the first Finite Impulse Response filter, wherein

the response signal acquiring unit acquires the first response signal employing the magnitude of the second signal that is employed when the second response signal is acquired as the magnitude of the first signal, adjusts the magnitude of the first signal in response to the magnitude of the first response signal, and acquires again the first response signal, wherein

the signal level adjusting unit varies the first response signal acquired again based on the amount by which the first signal is to be adjusted, and wherein

the filter coefficient setting unit sets a phase-inverted signal of the varied response signal as the filter coefficients of the second Finite Impulse Response filter.

12. The filter coefficient setting apparatus of claim 2 , wherein

the signal level adjusting unit varies the second response signal acquired again based on the amount by which the second signal is to be adjusted, and wherein

the filter coefficient setting unit sets the varied second response signal as the filter coefficients of the first Finite Impulse Response filter and, thereby, causes the fourth analog signal to be a signal obtained by removing or attenuating the first analog signal from a signal formed by combining the first analog signal and the third analog signal.

13. The filter coefficient setting apparatus of claim 12 , wherein

the filter coefficient setting unit sets a phase-inverted signal of the first response signal as the filter coefficients of the second Finite Impulse Response filter, wherein

the response signal acquiring unit acquires the second response signal employing the magnitude of the first signal that is employed when the first response signal is acquired as the magnitude of the second signal, adjusts the magnitude of the second signal in response to the magnitude of the second response signal, and acquires again the second response signal, wherein

the signal level adjusting unit varies the second response signal acquired again based on the amount by which the second signal is to be adjusted, and wherein

the filter coefficient setting unit sets the varied second response signal as the filter coefficients of the first Finite Impulse Response filter.

14. The filter coefficient setting apparatus of claim 12 , wherein

the filter coefficient setting unit sets the first response signal as the filter coefficients of the second Finite Impulse Response filter, wherein

the response signal acquiring unit acquires the second response signal employing the magnitude of the first signal that is employed when the first response signal is acquired as the magnitude of the second signal, adjusts the magnitude of the second signal in response to the magnitude of the second response signal, and acquires again the second response signal, wherein

the signal level adjusting unit varies the second response signal acquired again based on the amount by which the second signal is to be adjusted, and wherein

the filter coefficient setting unit sets a phase-inverted signal of the varied second response signal as the filter coefficients of the first Finite Impulse Response filter.

15. The filter coefficient setting apparatus of claim 2 , wherein

the response signal acquiring unit varies the magnitude of the first signal or the second signal at once such that the level of the first or the second response signal is equal to or larger than a predetermined level when the magnitude of the first or the second response signal is smaller than the predetermined level.

16. The filter coefficient setting apparatus of claim 2 , wherein

the response signal acquiring unit reduces stepwise the first signal or the second signal until the first or the second response signal is equal to or smaller than a predetermined level when the magnitude of the first or the second response signal is larger than the predetermined level.

17. A filter coefficient setting method of an echo preventing circuit having

a first Finite Impulse Response filter that is inputted with a first digital signal and that outputs a second digital signal,

a second Finite Impulse Response filter that is inputted with the first digital signal at the same time that the first Finite Impulse Response filter is inputted with the first digital signal, and that outputs a third digital signal,

a first DA converter that converts the second digital signal into a first analog signal and outputs the first analog signal,

a second DA converter that converts the third digital signal into a second analog signal and outputs the second analog signal,

an input/output terminal that outputs the first analog signal or that is inputted with a third analog signal,

a subtracting circuit that outputs a fourth analog signal obtained by subtracting the second analog signal from a signal formed by combining the first analog signal and the third analog signal, and

an AD converter that converts the analog signal outputted from the subtracting circuit into a digital signal and outputs the digital signal, the method comprising the steps of:

acquiring a first response signal of a section from an output of the first Finite Impulse Response filter to an output of the AD converter by generating a first signal;

adjusting the magnitude of the first signal in response to the magnitude of the first response signal;

acquiring again the first response signal;

setting the filter coefficients of the second Finite Impulse Response filter based on the first response signal acquired again;

setting the filter coefficients of the first Finite Impulse Response filter based on a second response signal of a section from an output of the second Finite Impulse Response filter to an output of the AD converter; and

adjusting the signal levels of the first and the second analog signals based on the amount by which the level of the first signal is to be adjusted such that the fourth analog signal is a signal obtained by removing or attenuating the first analog signal from a signal formed by combining the first analog signal and the third analog signal.

18. The filter coefficient setting method of claim 17 , comprising the steps of:

acquiring the second response signal by generating a second signal;

adjusting the magnitude of the second signal in response to the magnitude of the second response signal and acquiring again the second response signal; and

setting the filter coefficients of the first Finite Impulse Response filter based on the second response signal acquired again.

19. A recording medium having recorded thereon a program to set filter coefficients of an echo preventing circuit having

a processor,

a first Finite Impulse Response filter that is inputted with a first digital signal and that outputs a second digital signal,

a second Finite Impulse Response filter that is inputted with the first digital signal at the same time that the first Finite Impulse Response filter is inputted with the first digital signal, and that outputs a third digital signal,

a first DA converter that converts the second digital signal into a first analog signal and outputs the first analog signal,

a second DA converter that converts the third digital signal into a second analog signal and outputs the second analog signal,

an input/output terminal that outputs the first analog signal or that is inputted with the third analog signal,

a subtracting circuit that outputs a fourth analog signal obtained by subtracting the second analog signal from a signal formed by combining the first analog signal and the third analog signal, and

an AD converter that converts the analog signal outputted from the subtracting circuit into a digital signal and outputs the digital signal, the program being operable to cause the processor to implement the functions of:

acquiring a first response signal of a section from an output of the first Finite Impulse Response filter to the AD converter by generating a first signal;

adjusting the magnitude of the first signal in response to the magnitude of the first response signal and acquiring again the first response signal;

setting the filter coefficients of the second Finite Impulse Response filter based on the first response signal acquired again and setting the filter coefficients of the first Finite Impulse Response filter based on a second response signal of a section from an output of the second Finite Impulse Response filter to an output of the AD converter; and

adjusting the signal levels of the first and the second analog signals based on the amount by which the level of the first signal is to be adjusted such that the fourth analog signal is a signal obtained by removing or attenuating the first analog signal from a signal formed by combining the first analog signal and the third analog signal.

20. The recording medium recorded with a program of claim 19 , wherein the program is operable to cause the processor to implement the functions of:

acquiring the second response signal by generating a second signal;

adjusting the magnitude of the second signal in response to the magnitude of the second response signal and acquiring again the second response signal; and

setting the second response signal acquired again as the filter coefficients of the first Finite Impulse Response filter.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 21, 2007
From: INOUE, TAKEO; OHASHI, HIDEKI
To: SANYO ELECTRIC CO., LTD.
Reel/Frame 019044/0873 →