Granted Patent B2

US 7,728,433 · App. 11/736,402 · Granted Jun 1, 2010

Abstract

Claims (35)

1. A copper interconnect structure having increased electromigration lifetime, the interconnect comprising:

a semiconductor substrate;

a copper layer formed on the substrate;

and

a dielectric barrier stack formed on top of the copper layer, said dielectric barrier stack including a first portion consisting of a single first barrier layer formed adjacent to the copper layer and a second portion consisting of a single second barrier layer formed on the single first barrier layer, the first portion having improved adhesion to copper relative to the second portion, the second portion having a lower κ value relative to the κ value of the first portion and both portions being formed having resistance to copper diffusion and wherein the first portion has increased concentration of at least one of phosphorus and sulfur relative to the second portion of the barrier stack.

2. A copper interconnect structure having increased electromigration lifetime, the interconnect comprising:

a semiconductor substrate;

a copper layer formed on the substrate;

and

a dielectric barrier stack formed on top of the copper layer, said dielectric barrier stack including a first portion formed adjacent to the copper layer and a second portion formed on the first portion, the first portion having improved adhesion to copper relative to the second portion, the second portion having a lower κ value relative to the κ value of the first portion and both portions being formed having resistance to copper diffusion;

wherein the both portions of the barrier stack are each comprised of a material selected from among silicon carbide, silicon carbon nitride, silicon dioxide, and silicon nitride; and

wherein the first portion is formed having increased adhesion to the copper layer achieved by having a greater concentration of at least one of phosphorus and sulfur relative to the second portion of the barrier stack.

3. The structure of claim 1 wherein the first portion has been ion implanted to increase its concentration of at least one of phosphorus and sulfur relative to the second portion of the barrier stack thereby increasing its adhesion to copper and increasing its dielectric constant relative to the second portion of the stack and wherein the second portion comprises a thicker dielectric barrier layer comprised of a dielectric barrier material that has not been ion implanted in the same way as the first portion.

4. A semiconductor integrated circuit incorporating the structure of claim 3 .

5. A copper interconnect structure having increased electromigration lifetime, the interconnect comprising:

a semiconductor substrate;

a copper damascene structure formed in recesses formed in the substrate;

a first barrier layer having first portion formed on top of the semiconductor substrate and in contact with the copper damascene structure and having good adhesion to the copper of the copper damascene structure and having resistance to copper electromigration and also having a first κ value; and

the barrier layer including a second portion arranged in contact with and above the first portion and having a second κ value and having resistance to copper electromigration, the first portion including a concentration of dopant materials wherein said dopant materials include at least one of phosphorus and sulfur.

6. A copper interconnect structure having increased electromigration lifetime, the interconnect comprising:

a semiconductor substrate;

a copper damascene structure formed in recesses formed in the substrate;

a first barrier layer formed on top of the semiconductor substrate and in contact with the copper damascene structure, the first barrier layer having good adhesion to the copper of the copper damascene structure and having resistance to copper electromigration and also having a first κ value;

a second barrier layer formed on top of the semiconductor substrate and in contact with the first barrier layer and having a second κ value and having resistance to copper electromigration;

said first and second layers comprising a dielectric barrier stack with the first barrier layer having improved adhesion to copper relative to the second barrier layer, and wherein the second κ value of the second barrier layer has a lower value than the first κ value of the first barrier layer and having improved resistance;

wherein the first and second layers of the barrier stack are each comprised of a material selected from among silicon carbide, silicon carbon nitride, silicon dioxide, and silicon nitride; and

wherein the first barrier layer has a greater concentration of at least one of phosphorus and sulfur relative to the second barrier layer thereby increasing the adhesion of the first barrier layer to copper relative to the second barrier layer.

7. The structure of claim 6 wherein the first barrier layer is formed of a very thin profile of in the range of about 50 Å to about 100 Å.

8. The structure of claim 6 wherein the first barrier layer is formed of a very thin profile of about 50 Å.

9. The structure of claim 6 wherein the second barrier layer is formed to a greater thickness than the first barrier layer.

10. The structure of claim 6 wherein the second barrier layer is formed to a thickness in the range of about 200 Å to about 1000 Å.

11. The structure of claim 6 wherein the first barrier layer has a greater concentration of phosphorus relative to the second barrier layer.

12. The structure of claim 6 wherein the first barrier layer has a greater concentration of sulfur relative to the second barrier layer.

13. A semiconductor integrated circuit incorporating the structure of claim 3 .

14. A semiconductor integrated circuit incorporating the structure of claim 6 .

Assignments (8)