Electrical interconnection structure formation
View Patent ↗An electrical interconnection structure. The electrical structure comprises a substrate comprising electrically conductive pads and a first dielectric layer over the substrate and the electrically conductive pads. The first dielectric layer comprises vias. A metallic layer is formed over the first dielectric layer and within the vias. A second dielectric layer is formed over the metallic layer. A ball limiting metallization layer is formed within the vias. A photoresist layer is formed over a surface of the ball limiting metallization layer. A first solder ball is formed within a first opening in the photoresist layer and a second solder ball is formed within a second opening in the photoresist layer.
1. An electrical structure, comprising:
a substrate comprising a first electrically conductive pad and a second electrically conductive pad extending through a top surface of said substrate and formed within a volumetric portion of the substrate, wherein said top surface of said substrate is coplanar with a top surface of said first electrically conductive pad and a top surface of said second electrically conductive pad;
a first dielectric layer over and in contact with said top surface of said substrate, said top surface of said first electrically conductive pad, and said top surface of said second electrically conductive pad;
a first via and a second via in said first dielectric layer, said first via located over a portion of said top surface of said first electrically conductive pad, said second via located over a portion of said top surface of said second electrically conductive pad;
a metallic layer over a surface of said first dielectric layer and within said first via and said second via;
a second dielectric layer over a surface of said metallic layer, said second dielectric layer comprising a first portion removed from over and within said first via, a second portion removed from over and within said second via, and a third portion removed from between said first via and said second via;
a ball limiting metallization layer formed within said first via and said second via, over a section of said surface of said metallic layer, and over a surface of said second dielectric layer;
a first solder ball formed within and over said first via and extending laterally from said first via over and parallel to a first portion of a surface of said ball limiting metallization layer; and
a second solder ball formed within and over said second via and extending laterally from said second via over and parallel to a second portion of said surface of said ball limiting metallization layer.
2. The electrical structure of claim 1 , further comprising:
an opening in said ball limiting metallization layer and said metallic layer, said opening located between said first solder ball and said second solder ball.
3. The electrical structure of claim 1 , wherein said first solder ball is electrically connected to said first electrically conductive pad, and wherein said second solder ball is electrically connected to said second electrically conductive pad.
4. The electrical structure of claim 1 , wherein said first dielectric layer comprises more than one layer of dielectric material.
5. The electrical structure of claim 1 , wherein said metallic layer comprises a material selected from the group consisting of tantalum and tantalum nitride.
6. The electrical structure of claim 1 , wherein said second dielectric layer comprises a polyamide layer.
7. The electrical structure of claim 1 , wherein said metallic layer comprises a thickness at least 250 angstroms.
8. The electrical structure of claim 1 , wherein each of said first solder ball and said second solder ball comprises a substantially lead free solder composition.
9. The electrical structure of claim 1 , wherein said first dielectric layer and said second dielectric layer each comprise a different dielectric material.
10. The electrical structure of claim 1 , wherein said first dielectric layer is in contact with said top surface of said first electrically conductive pad, and wherein said first dielectric layer is not in contact with any other surfaces of said first electrically conductive pad.