IP Library Granted Patent US 7,847,340
Granted Patent B2
US 7,847,340 · App. 11/963,400 · Granted Dec 7, 2010

Semiconductor device and method for manufacturing the same

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Quick Facts
Patent No.
US 7,847,340
App. No.
11/963,400
Granted
Dec 7, 2010
Kind
B2
Abstract

The present invention provides a semiconductor device and a method of manufacturing the semiconductor device, the semiconductor device including: ONO films that are formed on a semiconductor substrate and include trapping layers; word lines that are formed on the ONO films; and silicon oxide layers that are formed at portions on the semiconductor substrate, the portions being located between the word lines, the silicon oxide layers being located between the trapping layers.

Claims (27)

1. A semiconductor device comprising:

ONO films formed on a semiconductor substrate and including trapping layers;

word lines formed on the ONO films wherein the top surfaces of the ONO films accommodate the entire bottom surfaces of the word lines; and

silicon oxide layers formed on portions of the semiconductor substrate, the portions being located between the word lines, the silicon oxide layers being located between the trapping layers of the ONO films below the word lines;

bit lines provided in the semiconductor substrate; and

metal plugs connected to the bit lines at regions between the word lines, wherein the trapping layers are continuously formed in the regions between the word lines where the metal plugs are provided, and

wherein the silicon oxide layers are provided between the trapping layers in the regions between the word lines where the metal plugs are not provided.

2. The semiconductor device in accordance with claim 1 , further comprising silicon nitride layers formed on the silicon oxide layers.

3. The semiconductor device in accordance with claim 1 , further comprising metal silicide layers formed between the bit lines and the metal plugs.

4. A method for manufacturing a semiconductor device comprising:

forming ONO films on a semiconductor substrate, the ONO films including trapping layers;

forming word lines on the ONO films wherein the top surfaces of the ONO films accommodate the entire bottom surfaces of the word lines;

forming silicon oxide layers by oxidizing portions of the trapping layers located between the word lines;

forming bit lines in the semiconductor substrate;

forming first silicon nitride films on the ONO films and the word lines; and

removing the first silicon nitride films in first regions, the first regions located between the word lines and defined as regions where metal plugs connected to the bit lines are not to be formed, and

wherein forming the silicon oxide layers includes oxidizing the trapping layers in the first regions and oxidizing the first silicon nitride films in second regions, the second regions located between the word lines and defined as regions where the metal plugs are to be formed.

5. The method in accordance with claim 4 , further comprising forming metal silicide layers on the bit lines in the second regions.

6. A method for manufacturing a semiconductor device comprising the steps of:

forming ONO films that include trapping layers on a semiconductor substrate;

forming word lines on the ONO films wherein the top surfaces of the ONO films accommodate the entire bottom surfaces of the word lines;

removing portions of the trapping layers located between the word lines; and

forming silicon oxide layers on portions of the semiconductor substrate located between the word lines where the portions of the trapping layers have been removed;

forming bit lines in the semiconductor substrate;

forming first silicon nitride films on the ONO films and the word lines; and

removing the first silicon nitride films in first regions, the first regions located between the word lines and defined as regions where metal plugs connected to the bit lines are not to be formed,

wherein removing the trapping layers includes removing the trapping layers in the first regions and removing the first silicon nitride films in second regions, the second regions located between the word lines and defined as regions where the metal plugs are to be formed.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2022
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES LLC
Reel/Frame 059721/0467 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036050/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2008
From: FUJII, KENICHI; OKANISHI, MASATOMI
To: SPANSION LLC
Reel/Frame 020881/0582 →