Method of forming an electronic device including forming features within a mask and a selective removal process
A method of forming an electronic device can include forming a patterned mask layer overlying a underlying layer such that the mask layer has a first feature, a second feature, and a third feature, and the first feature is between the second feature and the third feature. The first feature can be spaced apart from the second feature by a first opening in the mask layer, and can be spaced apart from the third feature by a second opening in the mask layer. The method can further include selectively removing portions of the underlying layer under the first opening, the second opening, the second feature, and the third feature, and also removing the second feature and the third feature while leaving substantially all of the first feature and a significant portion of the underlying layer under the first feature.
1. A method of forming an electronic device comprising:
forming a mask layer over an underlying layer;
patterning the mask layer to form
a first feature,
a second feature, and
a third feature
having substantially the same composition,
wherein the first feature is between the second feature and the third feature,
wherein the first feature
is spaced apart from the second feature by a first opening in the mask layer and
is spaced apart from the third feature by a second opening in the mask layer;
selectively removing portions of the underlying layer under
the first opening,
the second opening,
the second feature, and
the third feature; and
removing, by etching, substantially all of the second feature and substantially all of the third feature while leaving substantially all of the first feature and a significant portion of the underlying layer under the first feature.
2. The method of claim 1 , wherein forming the patterned mask layer comprises:
forming a resist material over the underlying layer;
selectively exposing portions of the resist material to radiation; and
removing portions of the resist material to form the patterned mask layer.
3. The method of claim 1 , wherein the significant portion of the underlying layer under the first feature comprises a full thickness of the underlying layer having a width extending laterally across a majority of the width of the first feature after selectively removing portions.
4. The method of claim 1 , wherein the underlying layer comprises doped polysilicon.
5. The method of claim 1 , wherein selectively removing portions comprises forming word lines of a memory array.
6. The method of claim 1 , wherein selectively removing portions comprises forming bit lines of a memory array.
7. The method of claim 1 , wherein the first feature comprises an array of discrete patterned portions laterally spaced apart and separated from each other by openings in the mask layer, the lateral distance between each of the discrete patterned portions defines a gap distance.
8. The method of claim 1 , wherein the second feature is spaced apart from an immediately adjacent discrete patterned portion of the first feature by a first lateral distance, and wherein the third feature is spaced apart from an immediately adjacent discrete patterned portion of the first feature by a second lateral distance, wherein the first lateral distance and the second lateral distance are the same.
9. The method of claim 8 , wherein the first lateral distance and the second lateral distance are greater than the gap distance.
10. The method of claim 8 , wherein the first lateral distance and the second lateral distance are at least approximately 70% of the gap distance.
11. The method of claim 1 , wherein the second feature and the third feature are significantly smaller than the first feature.
12. The method of claim 11 , wherein the first feature, second feature, and third feature comprise dimensions of length, width, and thickness, and wherein the second feature and the third feature have a width significantly less than a width of the first feature.
13. The method of claim 12 , wherein the width of the second feature and the third feature is not greater than approximately 90% of the width of the first feature.
14. The method of claim 12 , wherein the length of the second feature and the third feature is substantially the same as the length of the first feature.
15. The method of claim 1 , wherein selectively removing comprises:
completing a first portion of a selective etching process using a first etchant; and
completing a second portion of a selective etching process using a second etchant, the second etchant comprising an oxygen-containing material in a greater amount than present in the first etchant.
16. The method of claim 15 , wherein the first etchant comprises a hydrogen-containing material, and the second etchant comprises significantly less hydrogen-containing materials than the first etchant.
17. The method of claim 16 , wherein the first etchant comprises HBr, CCl 4 , CF 4 , CHF 3 , or a combination thereof.
18. The method of claim 1 , further comprising completely removing the first feature after selectively removing portions of the underlying layer.
19. A method of forming an electronic device comprising:
forming a patterned resist layer overlying a polysilicon layer,
the patterned resist layer having
a first feature,
a second feature, and
a third feature,
wherein the first feature is between the second feature and the third feature,
wherein the first feature
is spaced apart from the second feature by a first opening in the resist layer and
is spaced apart from the third feature by a second opening in the resist layer,
wherein the first feature comprises an array of discrete patterned portions laterally spaced apart and separated from each other,
wherein each of the discrete patterned portions have a width (W 2 ),
wherein the second feature comprises a width (W 1 ), and
wherein the width of each of the discrete patterned portions (W 2 ) is different than the width of the second feature (W 1 );
selectively etching all of the polysilicon layer under
the first opening,
the second opening,
the second feature, and
the third feature
using a first etchant comprising a hydrogen-containing material; and completely removing the second feature and the third feature
using a second etchant comprising
an oxygen-containing material and
less hydrogen-containing material than the first etchant,
wherein after selectively etching, the first feature remains and a significant portion of the polysilicon layer having a full thickness of the polysilicon layer underlying the first feature remains.
20. A method of forming an electronic device comprising:
forming a patterned mask layer
overlying an underlying layer and
having
a first feature,
a second feature, and
a third feature,
wherein the first feature is between the second feature and the third feature,
wherein the first feature
is spaced apart from the second feature by a first opening in the mask layer and
is spaced apart from the third feature by a second opening in the mask layer,
wherein the first feature comprises an array of discrete patterned portions laterally spaced apart and separated from each other by openings in the mask layer,
wherein the lateral distance between each of the discrete patterned portions define a gap distance,
wherein the second feature is spaced apart from an immediately adjacent discrete patterned portion of the first feature by a first lateral distance, and
wherein the first lateral distance and the gap distance are different;
selectively removing portions of the underlying layer under
the first opening,
the second opening,
the second feature, and
the third feature; and
removing, by etching, the second feature and the third feature while leaving substantially all of the first feature and a significant portion of the underlying layer under the first feature.