Vertical P-N junction device and method of forming same
View Patent ↗A P-N junction device and method of forming the same are disclosed. The P-N junction device may include a P-N diode, a PiN diode or a thyristor. The P-N junction device may have a monocrystalline or polycrystalline raised anode. In one embodiment, the P-N junction device results in a raised polycrystalline silicon germanium (SiGe) anode. In another embodiment, the P-N junction device includes a first terminal (anode) including a conductor layer positioned above an upper surface of a substrate and a remaining structure positioned in the substrate, the first terminal positioned over an opening in an isolation region; and a second terminal (cathode contact) positioned over the opening in the isolation region adjacent the first terminal. This latter embodiment reduces parasitic resistance and capacitance, and decreases the required size of a cathode implant area since the cathode contact is within the same STI opening as the anode.
1. A vertical P-N junction device comprising:
a first terminal including a conductor layer positioned above an upper surface of a substrate and a remaining structure positioned in the substrate, the first terminal positioned over an opening in an isolation region, wherein the first terminal includes an anode, and wherein the conductor layer is the same layer as a base of an isolated NPN bipolar transistor; and
a second terminal positioned over the opening in the isolation region adjacent the first terminal, wherein the second terminal contacts a cathode in the substrate.
2. The vertical P-N junction device of claim 1 , wherein the conductor layer includes monocrystalline silicon germanium (SiGe).
3. The vertical P-N junction device of claim 1 , wherein the conductor layer includes polycrystalline silicon germanium (SiGe).
4. The vertical P-N junction device of claim 1 , wherein the device constitutes one of: a P-N diode, a PiN diode or a thyristor.
5. The vertical P-N junction device of claim 1 , wherein the conductor layer includes a portion of monocrystalline silicon germanium (SiGe) or polycrystalline silicon germanium (SiGe), wherein the portion of monocrystalline silicon germanium (SiGe) or polycrystalline silicon germanium (SiGe) is located only at a center region of the conductor layer in the vertical P-N junction device.
6. The vertical P-N junction device of claim 1 , wherein the cathode is located directly below the anode within the substrate.
7. The vertical P-N junction device of claim 1 , wherein the cathode is located within the same opening in the isolation region as the anode.
8. A vertical P-N junction device comprising:
a raised polycrystalline silicon germanium (SiGe) anode, wherein the anode is positioned over an opening in an isolation region in a substrate, and a cathode terminal is positioned adjacent the anode over the opening in the isolation region, and wherein the raised polycrystalline SiGe anode is in a same layer as a base of an isolated NPN bipolar transistor.
9. The vertical P-N junction device of claim 8 , wherein the device constitutes one of: a P-N diode, a PiN diode or a thyristor.
10. The vertical P-N junction device of claim 8 , wherein the raised polycrystalline silicon germanium (SiGe) comprises a conductor layer having the polycrystalline silicon germanium (SiGe) located only at a center region thereof within the vertical P-N junction device.
11. The vertical P-N junction device of claim 8 , wherein the cathode terminal is located directly below the anode within the substrate.
12. The vertical P-N junction device of claim 8 , wherein the cathode terminal is located within the same opening in the isolation region as the anode.