Package with power and ground through via
View Patent ↗A wire bond design integrated circuit with a substrate having a front side and an opposing back side. Circuitry is disposed on the font side. Electrically conductive vias are disposed through the substrate from the front side to the back side, and are electrically connected to the circuitry such that the electrically conductive vias provide power and ground services only for the circuitry. Bonding pads are disposed on the front side, and are electrically connected to the circuitry such that the bonding pads provide signal communication only for the circuitry.
1. A wire bond design integrated circuit, comprising:
a substrate having a front side and an opposing back side,
circuitry disposed on the front side,
electrically conductive vias disposed through the substrate from the front side to the back side, the electrically conductive vias electrically connected to the circuitry such that the electrically conductive vias provide power and ground services only for the circuitry, wherein the electrically conductive vias are disposed only in at least one of a centered position of the substrate and a corner position of the substrate, and
bonding pads disposed on the front side, the bonding pads electrically connected to the circuitry such that the bonding pads provide signal communication only for the circuitry.
2. The wire bond design integrated circuit of claim 1 , wherein at least one of the electrically conductive vias is disposed in a corner position of the substrate, such that when the substrate was singulated, only one-quarter of an original size of the at least one electrically conductive via remained in the substrate.
3. A wire bond design package substrate, comprising:
a substrate having a front side and a back side,
a die attach pad disposed on the front side of the substrate, the die attach pad substantially covered with electrically conductive surfaces, the electrically conductive surfaces including at least one power surface and at least one ground surface, wherein the die attach pad is no larger than integrated circuits that the package substrate is designed to accommodate,
electrically conductive bonding fingers disposed outside of the die attach pad on the front side,
electrical connections disposed on the back side, and
electrically conductive traces disposed between the front side and the back side, the electrically conductive traces electrically connecting the bonding fingers and the electrically conductive surfaces on the front side to the electrical connections on the back side.
4. The wire bond design package substrate of claim 3 , wherein the at least one power surface comprises four power surfaces, one of each of the four power surfaces disposed in one of each of four corner positions of the die attach pad.
5. The wire bond design package substrate of claim 3 , wherein the at least one ground surface comprises only one ground surface disposed in at least a centered portion of the die attach pad.
6. A packaged integrated circuit, comprising:
a wire bond design integrated circuit, comprising:
an integrated circuit substrate having a front side and an opposing back side,
circuitry disposed on the font side of the integrated circuit substrate,
electrically conductive vias disposed through the integrated circuit substrate from the front side of the integrated circuit substrate to the back side of the integrated circuit substrate, the electrically conductive vias electrically connected to the circuitry such that the electrically conductive vias provide power and ground services only for the circuitry, wherein the electrically conductive vias are disposed only in at least one of a centered position of the integrated circuit substrate and a corner position of the integrated circuit substrate, and
bonding pads disposed on the front side of the integrated circuit substrate, the bonding pads electrically connected to the circuitry such that the bonding pads provide signal communication only for the circuitry,
a wire bond design package substrate, comprising:
a package substrate having a front side and a back side,
a die attach pad disposed on the front side of the package substrate, the die attach pad substantially covered with electrically conductive surfaces, the electrically conductive surfaces including at least one power surface and at least one ground surface, where the electrically conductive surfaces of the wire bond design package substrate make electrical connections with the electrically conductive vias of the wire bond design integrated circuit, wherein the die attach pad is no larger than the wire bond design integrated circuit,
electrically conductive bonding fingers disposed outside of the die attach pad on the front side of the package substrate,
electrical connections disposed on the back side of the package substrate, and
electrically conductive traces disposed between the front side of the package substrate and the back side of the package substrate, the electrically conductive traces electrically connecting the bonding fingers and the electrically conductive surfaces on the front side of the package substrate to the electrical connections on the back side of the package substrate, and
electrically conductive bonding wires forming electrical connections between the bonding pads and the bonding fingers.
7. The packaged integrated circuit of claim 6 , wherein the electrically conductive vias each comprise a single vertical bore from the front side of the integrated circuit substrate to the back side of the integrated circuit substrate.
8. The packaged integrated circuit of claim 6 , wherein at least one of the electrically conductive vias is disposed in a corner position of the of the integrated circuit substrate, such that when the integrated circuit substrate was singulated, only one-quarter of an original size of the at least one electrically conductive via remained in the integrated circuit substrate.
9. The packaged integrated circuit of claim 6 , wherein the at least one power surface comprises four power surfaces, one of each of the four power surfaces disposed in one of each of four corner positions of the die attach pad.
10. The packaged integrated circuit of claim 6 , wherein the at least one ground surface comprises only one ground surface disposed in at least a centered portion of the die attach pad.