IP Library Granted Patent US 7,732,252
Granted Patent B2
US 7,732,252 · App. 12/248,878 · Granted Jun 8, 2010

Multi-chip package system incorporating an internal stacking module with support protrusions

Assignee: Stats Chippac Ltd.
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Quick Facts
Patent No.
US 7,732,252
App. No.
12/248,878
Granted
Jun 8, 2010
Kind
B2
Abstract

The present invention provides a multi-chip package system that includes: providing a package substrate; attaching a base semiconductor die to the package substrate; connecting an interconnect between the base semiconductor die and the package substrate; and encapsulating at least portions of the package substrate, the base semiconductor die, and the interconnect with an encapsulant defining a support protrusion adjacent to the interconnect and substantially perpendicular to the package substrate, a cavity bounded by the support protrusion, and a gap linking the cavity to the edge of the encapsulant.

Claims (47)

1. A method of manufacturing a multi-chip package system comprising:

providing a package substrate;

attaching a base semiconductor die to the package substrate;

connecting an interconnect between the base semiconductor die and the package substrate; and

encapsulating at least portions of the package substrate, the base semiconductor die, and the interconnect with an encapsulant defining a support protrusion adjacent to the interconnect and substantially perpendicular to the package substrate, a cavity bounded by the support protrusion, and a gap linking the cavity to the edge of the encapsulant.

2. The method as claimed in claim 1 further comprising filling the cavity with an encapsulant or a penetrable adhesive material.

3. The method as claimed in claim 1 wherein encapsulating at least portions of the package substrate, the base semiconductor die, and the interconnect with an encapsulant defines a support protrusion with a circular or rectangular footprint placed at the corner or at the edge of the multi-chip package system adjacent to the interconnect and substantially perpendicular to the package substrate.

4. The method as claimed in claim 1 further comprising mounting a flip-chip semiconductor die over a portion of the base semiconductor die within the cavity.

5. The method as claimed in claim 1 wherein:

encapsulating at least portions of the package substrate, the base semiconductor die, and the interconnect with the encapsulant defining a support protrusion adjacent to the interconnect and substantially perpendicular to the package substrate, and a cavity bounded by the support protrusion; and

further comprising:

filling the cavity with a penetrable adhesive material; and

attaching the support protrusion to a base package substrate using an excess of the penetrable adhesive material, defining a separation gap between the support protrusion and the base package substrate.

6. A method of manufacturing a multi-chip package system comprising:

providing a package substrate;

attaching a base semiconductor die to the package substrate;

connecting an interconnect between the base semiconductor die and the package substrate;

encapsulating at least portions of the package substrate, the base semiconductor die, and the interconnect with an encapsulant defining a support protrusion adjacent to the interconnect and substantially perpendicular to the package substrate, a cavity bounded by the support protrusion, and a gap linking the cavity to the edge of the encapsulant;

attaching a base package substrate to the support protrusion;

connecting an interconnect between the base package substrate and the package substrate; and

encapsulating at least portions of the package substrate, the support protrusion, the cavity, the base package substrate, and the interconnect using an encapsulant.

7. The method as claimed in claim 6 further comprising attaching a device to a portion of the base package substrate within the cavity.

8. The method as claimed in claim 6 wherein encapsulating at least portions of the package substrate, the base semiconductor die, and the interconnect with the encapsulant results in the definition of a support protrusion with a circular or a rectangular footprint placed at the corner or at the edge of the multi-chip package system.

9. The method as claimed in claim 6 further comprising attaching a top flip-chip semiconductor die on the exposed portions of package substrate.

10. The method as claimed in claim 6 further comprising attaching: a below-substrate semiconductor die on the exposed region of the base package substrate following the application of the encapsulant.

11. A multi-chip package system comprising:

a package substrate;

a base semiconductor die attached to the package substrate;

an interconnect connecting the base semiconductor die to the package substrate;

a support protrusion adjacent to the interconnect and substantially perpendicular to the package substrate;

a cavity bounded by the support protrusion; and

a gap linking the cavity to the edge of the package substrate.

12. The system as claimed in claim 11 further comprising an encapsulant or a penetrable adhesive material filling the cavity.

13. The system as claimed in claim 11 wherein the support protrusion has a circular or rectangular footprint and is placed at the corner or at the edge of the multi-chip package system.

14. The system as claimed in claim 11 further comprising a flip-chip semiconductor die mounted over a portion of the base semiconductor die within the cavity.

15. The system as claimed in claim 11 further comprising:

a penetrable adhesive material filling the cavity;

a base package substrate mounted against the protrusion support; and

a separation gap between the support protrusion and the base package substrate defined by an excess of the penetrable adhesive material.

16. The system as claimed in claim 11 further comprising:

a base package substrate attached to the support protrusion;

an interconnect connecting the base package substrate to the package substrate; and

an encapsulant encapsulating at least portions of the package substrate, the support protrusion, the cavity, the base package substrate, and the interconnect.

17. The system as claimed in claim 16 further comprising a device attached to a portion of the base package substrate within the cavity.

18. The system as claimed in claim 16 wherein the support protrusion has a circular or a rectangular footprint and is located at the corner or at the edge of the multi-chip package system.

19. The system as claimed in claim 16 further comprising a top flip-chip semiconductor die attached to the exposed portions of the package substrate.

20. The system as claimed in claim 16 further comprising a below-substrate semiconductor die attached to the exposed region of the base package substrate.

Assignments (5)
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0328 Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064838/0948 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052935/0327 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0328 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2008
From: CHOW, SENG GUAN; KUAN, HEAP HOE; HUANG, RUI
To: STATS CHIPPAC LTD.
Reel/Frame 021718/0392 →
Continuity (1)
Related Publication 20100090350A1 · Apr 15, 2010