IP Library Granted Patent US 8,056,044
Granted Patent B2
US 8,056,044 · App. 12/254,859 · Granted Nov 8, 2011

Signal processing

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Quick Facts
Patent No.
US 8,056,044
App. No.
12/254,859
Granted
Nov 8, 2011
Kind
B2
Abstract

An iterative method for generating a series of output signal values from a series of input signal values is described. Iterations of the method comprise the steps of obtaining a current input signal value for the current iteration, comparing the current input signal value with an output signal value determined in a previous iteration, updating a counter value determined in the previous iteration based on the result of the comparison between the current input signal value and the previous output signal value such that the updated counter value replaces the counter value determined in the previous iteration, determining a slew value based on the counter value; and adding the slew value to the previously determined output signal value to generate a new current output signal value. Thus different slew values may be added to the previous output signal to obtain a new output signal. The counter value is updated so that its value reflects recent trends in the input signals. E.g. if the input signal is on an upward trend, the counter value may achieve a relative high value, for example because it is incremented each time an input signal exceeds a previously determined output signal. The magnitude of the slew values may increase as the counter value increases, thereby allowing the output signals to more rapidly track changes in the input signals.

Claims (39)

1. A method comprising:

obtaining, using one or more microcontrollers, a current input signal value for a current iteration;

comparing, using the one or more microcontrollers, the current input signal value with an output signal value determined in a previous iteration;

updating, using the one or more microcontrollers, a counter value determined in the previous iteration based on a result of the comparison between the current input signal value and the previously determined output signal value;

determining, using the one or more microcontrollers, a slew value based on the updated counter value; and

adding, using the one or more microcontrollers, the slew value to the previously determined output signal value to generate a current output signal value.

2. The method of claim 1 , wherein the determining the slew value is performed based on a size of a difference between the updated counter value and a pre-defined base value.

3. The method of claim 2 , wherein the determining the slew value is made such that slew values of greater magnitude are determined if the updated counter value is farther away from the pre-defined base value than if the updated counter value is nearer to the pre-defined base value.

4. The method of claim 1 , wherein a relationship between counter values and magnitudes of slew values is a non-linear relationship.

5. The method of claim 1 , wherein the slew value is determined from the updated counter value by reference to a pre-defined look-up table.

6. The method of claim 1 , further comprising defining a threshold counter value.

7. The method of claim 6 , wherein the updating the counter value is performed differently depending on whether the counter value is beyond the threshold counter value.

8. The method of claim 6 , wherein updating the counter value comprises:

comparing the updated counter value with the defined threshold counter value; and

incrementing, decrementing, or resetting the counter value to a base value depending on both a result of the comparing the counter value with the defined threshold counter value and the result of the comparison of the current input signal value with the output signal value determined in the previous iteration.

9. The method of claim 6 , further comprising if the counter value is beyond the defined threshold value and the updating the counter value brought the updated counter value closer to the defined threshold value, then setting the current output signal value to the previously determined output signal value.

10. The method of claim 1 , further comprising if the current input signal value is within a range bound by the previously determined output signal value and the current output signal value, then setting the current output signal value to the current input signal value.

11. The method of claim 1 , wherein the updated counter value is constrained to values between a predefined maximum counter value and a pre-defined minimum counter value.

12. The method of claim 1 , further comprising initializing a counter value and defining a notional previous output signal value for the first iteration.

13. The method of claim 12 , wherein the notional previous output signal value for the first iteration is one of the input signal values.

14. The method of claim 1 , wherein the slew value is defined to a higher precision than the input signal values.

15. The method of claim 1 , wherein the current output signal value is independent of a magnitude of a difference between the current input signal value and the previously determined output signal value.

16. The method of claim 1 , wherein the input signal values represent measurements from a sensing element of a capacitive sensor.

17. The method of claim 1 , further comprising providing the output signal value on an output signal line.

18. An apparatus comprising:

a storage component comprising registers for storing a counter value and a previous output signal value; and

a processing component operable to iteratively perform operations comprising:

obtaining a current input signal value for a current iteration;

comparing the current input signal value with a previous output signal value retrieved from the storage component;

updating a counter value stored in the storage component based on a result of the comparing between the current input signal value and the previous output signal value;

determining a slew value based on the updated counter value; and

adding the slew value to the previous output signal value to generate a current output signal value.

19. The apparatus of claim 18 , wherein the updating the counter value is performed differently depending on whether the counter value is beyond a threshold counter value.

20. One or more non-transitory computer-readable storage media that embody logic that is operable, when executed by a processor, to perform operations comprising:

obtaining a current input signal value for a current iteration;

comparing the current input signal value with a previous output signal value retrieved from a storage component;

updating a counter value stored in the storage component based on a result of the comparing the current input signal value and the previous output signal value;

determining a slew value based on the updated counter value; and

adding the slew value to the previous output signal value to generate a current output signal value.

Assignments (14)
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2019
From: MICROCHIP TECHNOLOGY INC.; ATMEL CORPORATION; MICROCHIP TECHNOLOGY GERMANY GMBH
To: NEODRÓN LIMITED
Reel/Frame 048259/0840 →
RELEASE OF SECURITY INTEREST IN CERTAIN PATENT RIGHTS Recorded Dec 21, 2018
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; ATMEL CORPORATION
Reel/Frame 047976/0884 →
RELEASE OF SECURITY INTEREST IN CERTAIN PATENT RIGHTS Recorded Dec 21, 2018
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; ATMEL CORPORATION
Reel/Frame 047976/0937 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
PATENT SECURITY AGREEMENT Recorded Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2009
From: PHILIPP, HARALD; YILMAZ, ESAT
To: ATMEL CORPORATION
Reel/Frame 023120/0293 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2009
From: QRG LIMITED
To: ATMEL CORPORATION
Reel/Frame 022783/0804 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2009
From: QRG LIMITED
To: ATMEL CORPORATION
Reel/Frame 022610/0350 →