Flash management using separate metadata storage
View Patent ↗Disclosed are techniques for flash memory management, including storing metadata and/or error correcting information separately from payload data. In various embodiments, metadata and/or error correcting information are stored in a random access memory within a solid state drive.
1. A method for flash memory management, comprising:
storing, in a flash memory, at least one of metadata or error correcting information associated with payload data stored in one or more logical pages in the flash memory;
storing, in a metadata storage memory, the at least one of metadata or error correcting information associated with payload data stored in one or more logical pages in the flash memory;
constructing, in the metadata storage memory, a data table associated with the flash memory, wherein entries of the data table correspond to logical pages within the flash memory, and wherein entries of the data table comprise the at least one of metadata or error correcting information associated with payload data stored in the logical pages; and
providing a logical to physical (L2P) table and a physical erase block (PEB) table configured to locate payload data written to the flash memory, wherein the L2P table and the PEB table are contained entirely in random access memory.
2. The method of claim 1 , wherein the metadata storage memory is configured for random access.
3. The method of claim 1 , wherein the flash memory comprises a plurality of erase blocks for storing payload data,
wherein each erase block for storing payload data in the flash memory comprises an index page for storing at least one of metadata or error correcting information for the logical pages in the erase block,
wherein the data table is constructed from the index page of each erase block for storing payload data in the flash memory, and
wherein the data table is constructed responsive to the flash memory being powered on.
4. The method of claim 1 wherein entries of the data table and the PEB table correspond to logical pages within the flash memory, and wherein the size of the logical pages is smaller than the size of a physical page in the flash memory.
5. The method of claim 4 , further comprising varying the size of the PEB table in order to vary the size of a logical page with respect to a physical page in the flash memory.
6. The method of claim 1 , further comprising updating the data table responsive to payload data being stored in at least one logical page within the flash memory, wherein the payload data is written to the flash memory in the order it was received from a host, and wherein writing the payload data in the order it was received from the host comprises:
locating a target page in an erase block in the flash memory;
combining the payload data with metadata;
writing the payload data and the metadata to the target page;
updating the logical to physical (L2P) table;
updating the physical erase block (PEB) table; and
responsive to page offset information indicating all pages in the erase block except an index page are full, writing index information for the erase block to the index page in the erase block.
7. The method of claim 6 , wherein writing the payload data in the order it was received from the host further comprises writing the payload data in a sequential manner within at least one erase block in the flash memory.
8. The method of claim 1 , further comprising retrieving at least one of metadata or error correcting information without accessing the flash memory.
9. The method of claim 1 , further comprising storing payload data in the flash memory, wherein the payload data is stored in memory elements in the flash memory intended to store at least one of metadata or error correcting information.
10. The method of claim 1 , wherein storing at least one of metadata or error correcting information comprises storing, in an erase block in the flash memory containing payload data, at least one of metadata or error correcting information associated with payload data stored in a different erase block in the flash memory.
11. The method of claim 1 , wherein the flash memory comprises a first flash memory chip for storing payload data and a second flash memory chip for storing payload data, wherein the payload data storage capacity of the first flash memory chip differs from the payload data storage capacity of the second flash memory chip.
12. The method of claim 1 , further comprising storing the data table on a flash chip in a solid state drive, wherein the flash chip is separately addressable from any portion of the flash memory used to store payload data.
13. The method of claim 1 , further comprising storing the data table in its entirety in a first location, and storing a copy of the data table in its entirety in a second location.
14. The method of claim 13 , wherein the first location is a first metadata storage memory within a solid state drive, and wherein the second location is a second metadata storage memory within the solid state drive.
15. The method of claim 14 , wherein the first metadata storage memory and the second metadata storage memory are located on different integrated circuits.
16. The method of claim 1 , wherein the PEB table tracks pages within erase blocks of the flash memory such that when a particular page is deemed unusable for storing payload data, other pages within the same erase block of the flash memory may still be used for storing payload data.
17. The method of claim 1 , further comprising:
receiving payload data from a host; and
writing the payload data to the flash memory in a location identified by the flash memory manufacturer for storage of at least one of metadata or error correcting information.
18. The method of claim 1 , wherein the flash memory comprises a first erase block containing payload data and a second erase block containing payload data, and wherein the first erase block comprises an index page for storing erase block index information for payload data written to pages in the second erase block.
19. A data storage system, comprising:
a first memory configured for block-based erase operations;
a controller in communication with the first memory, wherein the first memory stores at least one of metadata or error correcting information associated with payload data stored in one or more logical pages in the first memory; and
a second memory configured for random access in communication with the controller, wherein the second memory:
stores at least one of metadata or error correcting information associated with payload data stored in one or more logical pages in the first memory,
includes a data table, wherein entries of the data table correspond to logical pages within first memory and comprise at least one of metadata or error correcting information associated with the logical pages, and
includes a logical to physical (L2P) table and a physical erase block (PEB) table configured to locate payload data written to the first memory and contained entirely in random access memory.
20. The data storage system of claim 19 , wherein the controller comprises a buffer-host machine, a media-buffer machine, a data buffer, a local buffer, and a sequence and control machine.
21. The data storage system of claim 19 , wherein the controller is configured to write incoming payload data to an erase block in the first memory in the order it was received from a host.
22. The data storage system of claim 19 , further comprising updating the data table responsive to payload data being stored in at least one logical page within the first memory, wherein the payload data is written to the first memory in the order it was received from a host.
23. A tangible computer-readable storage medium having stored thereon instructions to perform operations comprising:
storing, in a flash memory, at least one of metadata or error correcting information associated with payload data stored in one or more logical pages in the flash memory;
storing, in a metadata storage memory, the at least one of metadata or error correcting information, associated with payload data stored in one or more logical pages in the flash memory; and
constructing, in the metadata storage memory, a data table associated with the flash memory, wherein entries of the data table correspond to logical pages within the flash memory, and wherein entries of the data table comprise at least one of metadata or error correcting information associated with payload data stored in the logical pages; and
providing a logical to physical (L2P) table and a physical erase block (PEB) table configured to locate payload data written to the flash memory, wherein the L2P table and the PEB table are contained entirely in random access memory.