Electronic device package and method of manufacture
A method of manufacturing an electronic device package. Coating a first side of a metallic layer with a first insulating layer and coating a second opposite side of the metallic layer with a second insulating layer. Patterning the first insulating layer to expose bonding locations on the first side of the metallic layer, and patterning the second insulating layer such that remaining portions of the second insulating layer on the second opposite side are located directly opposite to the bonding locations on the first side. Selectively removing portions of the metallic layer that are not covered by the remaining portions of the second insulating layer on the second opposite side to form separated coplanar metallic layers. The separated coplanar metallic layers include the bonding locations. Selectively removing remaining portions of the second insulating layer thereby exposing second bonding locations on the second opposite sides of the separated coplanar metallic layers.
1. A method of manufacturing an electronic device package, comprising:
coating a first side of a metallic layer with a first insulating layer;
coating a second opposite side of said metallic layer with a second insulating layer;
patterning said first insulating layer to expose bonding locations on said first side of said metallic layer;
patterning said second insulating layer such that remaining portions of said second insulating layer on said second opposite side are located directly opposite to said bonding locations on said first side;
selectively removing portions of said metallic layer that are not covered by said remaining portions of said second insulating layer on said second opposite side to form separated coplanar metallic layers, wherein said separated coplanar metallic layers include said bonding locations; and
selectively removing said remaining portions of said second insulating layer thereby exposing second bonding locations on said second opposite sides of said separated coplanar metallic layers.
2. The method of claim 1 , wherein said patterned first insulating layer is non-coplanar with said bonding locations.
3. The method of claim 1 , wherein said bonding locations are separated from each other by said patterned first insulating layer.
4. The method of claim 1 , wherein a perimeter of one of a plurality of openings in said patterned first insulating layer contacts a perimeter of one of said separated coplanar metallic layers.
5. The method of claim 1 , further including attaching an electronic device to at least one of said bonding locations configured as a device mounting site.
6. The method of claim 5 , further including bonding wires from interconnect pads of said electronic device to said bonding locations configured as wire bonding pads.
7. The method of claim 6 , further including depositing an insulating mold on said first side such that said mold covers said electronic device and said bonded wires.
8. The method of claim 1 , further including separating said patterned first insulating layer such that separated ones of said patterned first insulating layer each include at least one of said bonding locations configured as a device mounting site.
9. The method of claim 1 , further including bonding solder balls to said second bonding locations that are configured as solder ball bonding pads.
10. The method of claim 1 , further including bonding said second bonding locations that are configured as bonding pads to landing pads located on a mounting board.