IP Library Granted Patent US 8,255,655
Granted Patent B2
US 8,255,655 · App. 12/572,991 · Granted Aug 28, 2012

Authentication and securing of write-once, read-many (WORM) memory devices

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Quick Facts
Patent No.
US 8,255,655
App. No.
12/572,991
Granted
Aug 28, 2012
Kind
B2
Abstract

These embodiments relate to authentication and securing of write-once, read-many (WORM) memory devices. In one embodiment, a memory device comprises a controller operable in first and second modes of operation after stored security information is validated, wherein in the first mode of operation, the memory device operates in a read-only mode, and wherein in the second mode of operation, the memory device operates in a write-once, read-many (WORM) mode. In another embodiment, the controller is operative to perform security methods.

Claims (48)

1. A memory device comprising:

a memory storing security information; and

a controller in communication with the memory, wherein the controller is operative to:

place the memory device in an operational state only after a host device validates the stored security information; and

after the memory device is in the operational state:

power-up in read-only mode;

receive a command from the host device to switch to a write-once, read-many (WORM) mode;

in response to the command from the host device, switch from the read-only mode to the WORM mode; and

while in the WORM mode:

receive a write command from the host device; and

determine if the write command should be performed.

2. The memory device of claim 1 , wherein the stored security information is unique to the memory device.

3. The memory device of claim 1 , wherein the stored security information is unique to a batch of memory devices that includes the memory device.

4. The memory device of claim 1 , wherein information used to validate the stored security information is stored on the host device.

5. The memory device of claim 1 , wherein information used to validate the stored security information is stored on a server in communication with the host device.

6. The memory device of claim 1 , wherein the stored security information comprises an RSA certificate, and wherein information used to validate the RSA certificate comprises a certificate authority root certificate and a certificate revocation list.

7. The memory device of claim 1 , wherein, after the stored security information is validated, a flag is stored in the memory device to place the memory device in the operational state.

8. The memory device of claim 1 , wherein the stored security information is stored in a hidden area in the memory device.

9. The memory device of claim 1 , wherein the memory device is placed in the operational state after the stored security information is validated and after at least one additional item is validated.

10. The memory device of claim 9 , wherein the at least one additional item comprises a time stamp or an identifier of the memory device.

11. The memory device of claim 9 , wherein at least one of the stored security information and the at least one additional item is encrypted.

12. The memory device of claim 1 , wherein the stored security information is automatically validated by the host device.

13. The memory device of claim 12 , wherein the host device is operated by an authorized user.

14. The memory device of claim 1 , wherein the memory comprises NAND.

15. A method for authenticated a memory device, the method comprising:

performing the following with a memory device comprising a controller:

receiving a request from a host in communication with the memory device for security information stored in the memory device;

sending the security information to the host;

if the security information is validated receiving information from the host that places the memory device in an operational state; and

after the memory device is in the operational state:

powering-up in read-only mode;

receiving a command from the host device to switch to a write-once, read-many (WORM) mode;

in response to the command from the host device, switching from the read-only mode to the WORM mode; and

while in the WORM mode:

receiving a write command from the host device; and

determining if the write command should be performed.

16. The method of claim 15 , wherein the stored security information is unique to the memory device.

17. The method of claim 15 , wherein the stored security information is unique to a batch of memory devices that includes the memory device.

18. The method of claim 15 , wherein information used to validate the security information is stored on a server in communication with the host device.

19. The method of claim 15 , wherein the security information comprises an RSA certificate, and wherein a certificate authority root certificate and a certificate revocation list are used to validate the RSA certificate.

20. The method of claim 15 , wherein the information received from the host device that places the memory device in an operational state comprises a flag.

21. The method of claim 15 , wherein the security information is stored in a hidden area in the memory device.

22. The method of claim 15 further comprising sending at least one additional item to the host device for validation, wherein the memory device receives the information from the host device that places the memory device in the operational state if both the security information and the at least one additional item are validated.

23. The method of claim 22 , wherein the at least one additional item comprises a time stamp or an identifier of the memory device.

24. The method of claim 22 , wherein at least one of the stored security information and the at least one additional item is encrypted.

25. The method of claim 15 , wherein the stored security'information is automatically validated by the host device.

26. The method of claim 15 , wherein the stored security information is validated by the host device, and wherein the host device is operated by an authorized user.

27. The method of claim 15 , wherein the memory comprises NAND.

Assignments (6)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2011
From: SANDISK CORPORATION
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 026226/0164 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2009
From: YU, SAMUEL Y.; MOORE, CHRISTOPHER S.; WHETSTONE, JASON S.; BARZILAI, RON; INO, HIRONAGA
To: SANDISK CORPORATION
Reel/Frame 023332/0032 →