Motor driving circuit
A motor driving circuit includes a three-phase inverter circuit 8 , including three upper-arm switching elements 56 a to 56 c for driving upper arms of different phases of a three-phase motor 3 , and three lower-arm switching elements 56 d to 56 f for driving lower arms of different phases. At least one of the upper-arm switching elements 56 a to 56 c and the lower-arm switching elements 56 d to 56 f is a semiconductor element that performs a diode operation. The diode operation is an operation in which a voltage less than or equal to a threshold voltage of a gate electrode G is applied to the gate electrode G with reference to a potential of a first ohmic electrode S, thereby conducting a current flow from the first ohmic electrode S to a second ohmic electrode D and blocking a current flow from the second ohmic electrode D to the first ohmic electrode S.
1. A motor driving circuit, comprising:
a three-phase inverter circuit, including three upper-arm switching elements for driving upper arms of different phases of the three-phase motor, and three lower-arm switching elements for driving lower arms of different phases,
at least one of the lower-arm switching elements and the upper-arm switching elements is a semiconductor element, including
a semiconductor layer stack made of nitride semiconductor layers formed on a substrate,
a first ohmic electrode and a second ohmic electrode formed on the semiconductor layer stack spaced apart from each other, and
a first gate electrode formed between the first ohmic electrode and the second ohmic electrode,
wherein the semiconductor element performs a diode operation in which a voltage less than or equal to a threshold voltage of the first gate electrode is applied to the first gate electrode with reference to a potential of the first ohmic electrode, thereby conducting a current flow from the first ohmic electrode to the second ohmic electrode and blocking a current flow from the second ohmic electrode to the first ohmic electrode.
2. The motor driving circuit of claim 1 , wherein
the semiconductor element performs a bidirectional FET operation in which a voltage higher than the threshold voltage of the first gate electrode is applied to the first gate electrode with reference to the potential of the first ohmic electrode, thereby conducting a current flow from the first ohmic electrode to the second ohmic electrode, and conducting a current flow from the second ohmic electrode to the first ohmic electrode.
3. The motor driving circuit of claim 1 , wherein
the threshold voltage of the first gate electrode of the semiconductor element is 0 V or more.
4. The motor driving circuit of claim 3 , comprising:
a first p-type semiconductor layer between the semiconductor layer stack and the first gate electrode.
5. The motor driving circuit of claim 4 , wherein
the semiconductor element has an operation mode in which a voltage greater than or equal to a built-in potential of a pn junction formed by the first p-type semiconductor layer and the semiconductor layer stack is applied between the first gate electrode and the first ohmic electrode.
6. The motor driving circuit of claim 3 , wherein
the upper-arm switching elements are given, one after another, different predetermined pulse width modulation control phase periods so that each upper-arm switching element is conductive during each pulse width period in the corresponding pulse width modulation control phase period,
each of the lower-arm switching elements is conductive during each pulse interval period, which is a period excluding the pulse width period in each pulse cycle in the pulse width modulation control phase period of one of the upper-arm switching elements of the corresponding phase, and
the three-phase motor is controlled by a pulse modulation control by modulating the pulse width period.
7. The motor driving circuit of claim 1 , wherein
the semiconductor element includes a first insulating film between the first gate electrode and the semiconductor layer stack.
8. The motor driving circuit of claim 1 , wherein
the semiconductor element includes a second gate electrode formed between the first gate electrode and the second ohmic electrode, and
a voltage greater than or equal to a threshold voltage of the second gate electrode is applied to the second gate electrode with reference to a potential of the second ohmic electrode.
9. The motor driving circuit of claim 8 , wherein the semiconductor device includes
a first insulating film formed between the first gate electrode and the semiconductor layer stack, and
a second insulating film formed between the second gate electrode and the semiconductor layer stack.
10. The motor driving circuit of claim 8 , wherein
the threshold voltages of the first gate electrode and the second gate electrode of the semiconductor element are 0 V or more.
11. The motor driving circuit of claim 10 , comprising
a first p-type semiconductor layer formed between the semiconductor layer stack and the first gate electrode, and a second p-type semiconductor layer formed between the semiconductor layer stack and the second gate electrode.
12. The motor driving circuit of claim 11 , wherein the semiconductor element has
an operation mode in which a voltage greater than or equal to a built-in potential of a pn junction formed by the first p-type semiconductor layer and the semiconductor layer stack is applied between the first gate electrode and the first ohmic electrode, and
an operation mode in which a voltage greater than or equal to a built-in potential of a pn junction formed by the second p-type semiconductor layer and the semiconductor layer stack is applied between the second gate electrode and the second ohmic electrode.
13. The motor driving circuit of claim 10 , wherein
the upper-arm switching elements are given, one after another, different predetermined pulse width modulation control phase periods so that each upper-arm switching element is conductive during each pulse width period in the corresponding pulse width modulation control phase period,
each of the lower-arm switching elements is conductive during each pulse interval period, which is a period excluding the pulse width period in each pulse cycle in the pulse width modulation control phase period of one of the upper-arm switching elements of the corresponding phase, and,
the three-phase motor is controlled by a pulse modulation control by modulating the pulse width period.
14. The motor driving circuit of claim 1 , wherein
the semiconductor layer stack includes a first semiconductor layer and a second semiconductor layer layered in this order from the substrate side, wherein the second semiconductor layer has a larger bandgap than the first semiconductor layer.