Method and apparatus for multi-chip packaging
View Patent ↗A method and apparatus are provided for multi-chip packaging. A multi-chip package ( 100 ) includes a substrate ( 105 ) and a plurality of semiconductor dice ( 110, 120, 130 ). A first semiconductor die ( 110 ) is physically coupled to an upper face of the substrate ( 105 ), the first semiconductor die ( 110 ) being a smallest one of the plurality of semiconductor dice ( 110, 120, 130 ).
1. An electronic device comprising:
a controller; and
a multi-chip package coupled to the controller, the multi-chip package comprising:
a substrate;
a plurality of semiconductor dice, wherein a first one of the plurality of semiconductor dice is physically coupled to an upper face of the substrate, the first one of the plurality of semiconductor dice being a smallest one of the plurality of semiconductor dice;
a second one of the plurality of semiconductor dice coupled to an upper face of the first one of the plurality of semiconductor dice, wherein the second one of the plurality of semiconductor dice is larger than the first one of the plurality of semiconductor dice and the first and second ones of the plurality of semiconductor dice are smaller than other ones of the plurality of semiconductor dice; and
wherein the multi-chip package is a storage device, and wherein the plurality of semiconductor dice include at least one nonvolatile semiconductor memory die and at least one volatile semiconductor memory die.
2. The electronic device in accordance with claim 1 wherein the plurality of semiconductor dice further include at least one logic semiconductor die for providing memory control functionality for the at least one nonvolatile semiconductor memory die and the at least one volatile semiconductor memory die. the at least one logic semiconductor die coupled to the controller.