Timing violation debugging inside place and route tool
View Patent ↗A storage medium for use in a computer to develop a circuit design. The storage medium recording a software tool that may be readable and executable by the computer. The software tool generally includes the steps of (A) receiving a first user input that identifies a specific cell of a plurality of existing cells in the circuit design, the specific cell having a timing characteristic, (B) generating a replacement display corresponding to the specific cell, the replacement display comprising a plurality of alternate cells suitable to replace the specific cell, each of the alternate cells having a different value associated with the timing characteristic of the specific cell, (C) receiving a second user input that identifies a replacement cell of the alternate cells and (D) automatically generating a first engineering change order to replace the specific cell with the replacement cell.
1. A non-transitory storage medium recording a software tool that is readable and executable by a computer to develop a circuit design, wherein said software tool, when executed, performs the steps of:
(A) receiving a first user input that identifies a specific cell in a display of said circuit design, said specific cell having a timing characteristic corresponding to a specific violation of a plurality of performance violations;
(B) generating a replacement display corresponding to said specific cell, wherein (i) said replacement display comprises a plurality of alternate cells and (ii) at least two of said alternate cells have different values associated with said timing characteristic of said specific cell; and
(C) generating a first engineering change order that replaces said specific cell with one of said alternate cells identified by a second user input.
2. The non-transitory storage medium according to claim 1 , wherein said software tool further performs the step of:
generating a timing display comprising (i) a name of said specific cell and (ii) a specific value of said timing characteristic.
3. The non-transitory storage medium according to claim 1 , wherein said software tool further performs the step of:
receiving a third user input that identifies a specific network in said circuit design.
4. The non-transitory storage medium according to claim 3 , wherein said software tool further performs the step of:
generating a buffer display corresponding to said specific network, wherein said buffer display comprises (i) a plurality of available buffers and (ii) a plurality of performance characteristics of said available buffers.
5. The non-transitory storage medium according to claim 4 , wherein said software tool further performs the step of:
receiving a fourth user input that identifies a specific buffer of said available buffers.
6. The non-transitory storage medium according to claim 5 , wherein said software tool further performs the step of:
generating a second engineering change order that inserts said specific buffer into said specific network.
7. The non-transitory storage medium according to claim 1 , wherein said specific violation is determined apart from a place and route operation.
8. The non-transitory storage medium according to claim 1 , wherein said software tool further performs the step of:
generating a violation display comprising (i) said performance violations of said circuit design and (ii) said specific violation.
9. The non-transitory storage medium according to claim 1 , wherein said software tool further performs the step of:
receiving a third user input that identifies said specific violation of said performance violations.
10. The non-transitory storage medium according to claim 1 , wherein said software tool further performs the step of:
generating a layout display comprising a block diagram of said circuit design corresponding to said specific violation.
11. A non-transitory storage medium recording a software tool that is readable and executable by a computer to develop a circuit design, wherein said software tool, when executed, performs the steps of:
(A) receiving a first user input that identifies a specific buffer in a display of said circuit design, said specific buffer being associated with a specific violation of a plurality of performance violations;
(B) generating a buffer display corresponding to said specific buffer, wherein said buffer display comprises (i) a plurality of alternate buffers and (ii) a plurality of performance characteristics of said alternate buffers; and
(C) generating a first engineering change order that replaces said specific buffer with one of said alternate buffers identified by a second user input.
12. The non-transitory storage medium according to claim 11 , wherein said software tool further performs the step of:
receiving a third user input that identifies a specific network in said circuit design containing said specific buffer.
13. The non-transitory storage medium according to claim 11 , wherein said software tool further performs the step of:
generating a layout display comprising a block diagram of said circuit design corresponding to said specific violation.
14. The non-transitory storage medium according to claim 11 , wherein said software tool further performs the step of:
receiving a third user input that identifies a specific cell in said circuit design, wherein said specific cell has a timing characteristic associated with a timing violation of said performance violations.
15. The non-transitory storage medium according to claim 14 , wherein said software tool further performs the step of:
generating a replacement display corresponding to said specific cell, wherein (i) said replacement display comprising a plurality of alternate cells and (ii) at least two of said alternate cells have different values associated with said timing characteristic of said specific cell.
16. The non-transitory storage medium according to claim 15 , wherein said software tool further performs the step of:
generating a second engineering change order that replaces said specific cell with one of said alternate cells identified by a fourth user input.
17. The non-transitory storage medium according to claim 11 , wherein said performance violations comprise at least one of (i) a timing violation, (ii) a crosstalk violation, (iii) a noise violation, (iv) an IR drop induced violation and (v) an electromigration violation.
18. The non-transitory storage medium according to claim 11 , wherein said software tool further performs the step of:
generating a timing display comprising (i) a name of a specific cell and (ii) a specific value of a timing characteristic of said specific cell.
19. The non-transitory storage medium according to claim 11 , wherein said software tool further performs the steps of:
generating a violation display comprising said performance violations;
receiving a third user input that identifies a selected violation of said performance violations; and
generating a layout display comprising a block diagram of said circuit design corresponding to said selected violation.
20. A method of developing a circuit design, comprising the steps of:
(A) receiving a first user input that identifies a specific cell in a display of said circuit design, said specific cell having a timing characteristic corresponding to a specific violation of a plurality of performance violations;
(B) generating a replacement display corresponding to said specific cell using a computer, wherein (i) said replacement display comprises a plurality of alternate cells and (ii) at least two of said alternate cells have different values associated with said timing characteristic; and
(C) generating a first engineering change order that replaces said specific cell with one of said alternate cells identified by a second user input.