IP Library Granted Patent US 8,489,910
Granted Patent B2
US 8,489,910 · App. 12/817,692 · Granted Jul 16, 2013

Timing controller, timing control method, and timing control system

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Quick Facts
Patent No.
US 8,489,910
App. No.
12/817,692
Granted
Jul 16, 2013
Kind
B2
Abstract

A timing controller includes a controller that controls an operation timing of a controlled unit, and a setting unit that associates a timing obtained by dividing a setting of the operation timing into a plurality of timings, each timing having an identification number, and sets the control unit so that an offset period based on the associated timing is added to the operation timing of the controlled unit.

Claims (23)

1. A timing controller comprising:

a communication controller configured to receive data including duty ratio information;

a counter configured to count a count value based on a clock signal and reset the count value based on a reset signal;

a counter controller configured to calculate a start value based on the duty ratio information, output a comparison result between the count value and the start value as a start signal and output the reset signal when the count value reaches a cycle value; and

a pulse generator configured to calculate a drive end value based on the duty ratio information and the cycle value, start outputting a drive signal based on the start signal and continue to output the drive signal until the count value exceeds the drive end value.

2. The timing controller according to claim 1 , wherein the counter controller is configured to add an offset value to the start value.

3. The timing controller according to claim 2 , wherein the offset value is set based on the duty ratio information.

4. A timing control method comprising:

receiving data including duty ratio information;

counting a count value based on a clock signal and resetting the count value based on a reset signal;

calculating a start value based on the duty ratio information, outputting a comparison result between the count value and the start value as a start signal and outputting the reset signal when the count value reaches a cycle value; and

calculating a drive end value based on the duty ratio information and the cycle value, starting outputting a drive signal based on the start signal and continuing to output the drive signal until the count value exceeds the drive end value.

5. The timing control method according to claim 4 , further comprising adding an offset value to the start value.

6. The timing control method according to claim 5 , wherein the offset value is set based on the duty ratio information.

7. A timing control system comprising:

a plurality of timing controllers, each timing controller including:

a communication controller configured to receive data including duty ratio information;

a counter configured to count a count value based on a clock signal and reset the count value based on a reset signal;

a counter controller configured to calculate a start value based on the duty ratio information, output a comparison result between the count value and the start value as a start signal and output the reset signal when the count value reaches a cycle value; and

a pulse generator configured to calculate a drive end value based on the duty ratio information and the cycle value, start outputting a drive signal based on the start signal and continue to output the drive signal until the count value exceeds the drive end value.

8. The timing control system according to claim 7 , wherein the counter controller is configured to add an offset value to the start value.

9. The timing control system according to claim 8 , wherein the offset value is set based on the duty ratio information.

10. The timing control system according to claim 8 , wherein the respective offset value in each of the plurality of timing controllers is added to the respective start value so that the respective counter controller in each of the plurality of timing controllers outputs the start signal in a different timing.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE FOLLOWING NUMBERS 6272046,7277824,7282374,7286384,7299106,7337032,7460920,7519447 PREVIOUSLY RECORDED ON REEL 039676 FRAME 0237. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 16, 2018
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING
Reel/Frame 047797/0854 →
RELEASE OF SECURITY INTEREST Recorded Dec 22, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 044949/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 044938/0360 →
SECURITY INTEREST Recorded Aug 15, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039676/0237 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036055/0276 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Dec 30, 2014
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 034715/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2010
From: ASANO, SHIGETAKA
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024558/0842 →