CMOS structure and method of manufacture

1. A method, comprising:

forming a device in a device layer on a temporary substrate;

removing the temporary substrate from the device layer by grinding and wet etching processes; and

bonding a permanent electrically insulative substrate to the device layer with a bonding structure, in place of the temporary substrate,

wherein the device layer and the permanent electrically insulative substrate have about a same coefficient of thermal expansion.

2. The method of claim 1 , wherein the bonding structure is a high temperature adhesive.

3. The method of claim 2 , wherein the high temperature adhesive can withstand temperatures to about 350° C.

4. The method of claim 1 , wherein the bonding structure is an epoxy.

5. The method of claim 1 , wherein the bonding structure is an oxide to oxide bond, which includes forming oxide on a surface of the device layer and permanent electrically insulative substrate, and undergoing a high temperature annealing process.

6. The method of claim 1 , wherein the bonding structure is an oxide to nitride bond which includes forming one of an oxide and nitride on a surface of the device layer and permanent electrically insulative substrate, respectively, and undergoing a high temperature annealing process.

7. The method of claim 1 , further comprising attaching a releasable wafer to the device layer by an adhesive, prior to the bonding of the permanent electrically insulative substrate.

8. The method of claim 7 , wherein the adhesive is a releasable adhesive.

9. The method of claim 8 , wherein the releasable adhesive is a high temperature releasable adhesive that can withstand temperatures to about 350° C.

10. The method of claim 7 , wherein the releaseable wafer is released from the adhesive by laser ablation and the adhesive is removed by grinding and etching processes.

11. The method of claim 10 , wherein the etching is a wet etch.

12. A method, comprising:

forming a device in a device layer on a temporary substrate;

attaching a releasable wafer to the device layer on an opposing side to the temporary substrate;

removing the temporary substrate from the device layer;

bonding a permanent electrically insulative substrate to the device layer with a bonding structure, the permanent electrically insulative substrate being in place of the temporary substrate; and

removing the releasable wafer after bonding of the permanent electrically insulative substrate,

wherein:

the releasable wafer is removed by laser ablation;

the bonding structure is removed by grinding and etching processes; and

the device layer and the permanent electrically insulative substrate have about a same coefficient of thermal expansion.

13. The method of claim 12 , wherein the releasable wafer is attached using a releaseable adhesive bonded between the device layer and the releasable wafer.

14. The method of claim 13 , wherein the releasable adhesive is a high temperature releasable adhesive that can withstand temperatures to about 350° C.

15. The method of claim 12 , wherein the permanent electrically insulative substrate is sapphire and the temporary substrate is SOI.

16. The method of claim 12 , wherein the bonding structure is an oxide to oxide bond or oxide to nitride bond.

17. The method of claim 12 , wherein the temporary substrate is removed by grinding and wet etching processes.

18. The method of claim 1 , wherein the permanent electrically insulative substrate is glass.

19. The method of claim 9 , further comprising:

removing the releaseable wafer by laser ablation; and

removing the releaseable adhesive by grinding and etching processes.

20. The method of claim 19 , wherein:

the device layer and the substrate have a total thickness of about 700 microns;

the permanent substrate has a thickness between about 700 microns and about 750 microns; and

the bonding structure and the releasable adhesive withstand temperatures to about 350° C.

21. The method of claim 1 , further comprising removing the adhesive using an ashing process.