Flash memory device with word lines of uniform width and method for manufacturing thereof
A method for manufacturing a semiconductor device, the method including: forming a bit line in a semiconductor substrate; forming a plurality of word lines which intersect with the bit line at predetermined intervals on the semiconductor substrate; eliminating a portion of the plurality of word lines; forming an interlayer insulating film on the semiconductor substrate; and forming a metal plug which penetrates through the interlayer insulating film and is coupled to the bit line in a region where the portion of the plurality of word lines was eliminated.
1. A semiconductor device comprising:
a bit line formed in a semiconductor substrate;
a plurality of word lines, wherein the plurality of word lines is formed on the semiconductor substrate and intersects with the bit line; and
a single metal plug formed between a first word line and a second word line of the plurality of word lines, wherein the first word line and the second word line constitute the single pair of the plurality of word lines in the semiconductor device between which the single metal plug is coupled to a single bit line,
wherein a distance between the first word line and the second word line is equal to the sum of:
a natural number multiplied by:
the sum of the distance between a pair of word lines of the plurality of word lines and the width of a word line of the plurality of word lines, and
the distance between a pair of word lines of the plurality of word lines.
2. The semiconductor device of claim 1 , wherein the plurality of word lines include an area that is eliminated.
3. The semiconductor device of claim 1 , further comprising a first insulating layer and first conductive layers, wherein the first insulating layer is formed on the bit line between the first conductive layers.
4. The semiconductor device of claim 3 , further comprising second insulating layers formed among the plurality of word lines.
5. The semiconductor device of claim 1 , further comprising a charge storage layer formed on the semiconductor substrate.