Semiconductor device and method for fabricating thereof
View Patent ↗A silicon nitride film, which is a second hard mask, is dry etched to be removed completely. The silicon nitride film, which is formed on a sidewall of a silicon nitride film used as a first hard mask, has a relatively low etching rate. Therefore, if the silicon nitride film is continued etching until the corresponding portion thereof is removed, polysilicon is etched in a direction of depth in trench shape. Then, floating gates in adjacent cells are separated and a step portion of the polysilicon is formed. Consequently, a remaining portion of the silicon nitride film used as the first hard mask is removed, an ONO film is laminated on a whole surface of the poly silicon having the step portion on an edge that has been etched, and then, a polysilicon for a control gate is laminated on the ONO film.
1. A method of fabricating a semiconductor device, comprising:
providing a tunnel oxide film on a semiconductor substrate;
forming a first mask having a first window having a size W 1 on a conductive film provided on the tunnel oxide film, a floating gate of the semiconductor device being defined from the conductive film;
etching a part of the conductive film in a thickness direction thereof from the first window of the first mask;
removing the first mask;
forming a second mask having a second window that has a size W 2 (<W 1 ) on the conductive film that is concentric with the first window; and
etching a rest of the conductive film in the thickness direction by using the second mask to form a step on a sidewall of the conductive film,
wherein the first and second masks are photoresist masks.
2. The method as claimed in claim 1 , wherein the first and second masks are hard masks of a silicon nitride film or a silicon oxide film.
3. The method as claimed in claim 1 , further comprising thermally oxidizing the conductive film to round a corner of the step formed on the sidewall of the conductive film.
4. A method of fabricating a semiconductor device comprising:
forming a semiconductor substrate; and
forming a cell region having a tunnel oxide film, a floating gate, a dielectric film and a control gate that are laminated in this order on the semiconductor substrate, wherein the floating gate is formed to include a plurality of steps that are formed successively inward in the direction from the bottom of the floating gate to the top thereof wherein the steps are provided at intervals approximately equal to h/(n+1) where n is the number of steps, h is the height of the sidewall of the floating gate and the steps are of equal length.
5. The method as claimed in claim 4 , wherein the floating gate comprises one of polysilicon and amorphous silicon.
6. The method as claimed in claim 4 , wherein the floating gate is doped with phosphorus.
7. The method as claimed in claim 4 , wherein the dielectric film comprises one of an ON film having a silicon oxide film and a silicon nitride film laminated in this order and an ONO film having a silicon oxide film, a silicon nitride film and another silicon oxide film laminated in this order.
8. The method as claimed in claim 4 , wherein the gate includes a sidewall having a step formed from a single material on which the dielectric film is provided.