IP Library Granted Patent US 8,531,904
Granted Patent B2
US 8,531,904 · App. 13/205,820 · Granted Sep 10, 2013

Methods and apparatus for extending the effective thermal operating range of a memory

Inventors: Tyler J. Thorp (Palo Alto, CA); Roy E. Scheuerlein (Cupertino, CA)
Assignee: SanDisk 3D LLC
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Quick Facts
Patent No.
US 8,531,904
App. No.
13/205,820
Granted
Sep 10, 2013
Kind
B2
Abstract

Apparatus and systems are provided for thermal regulation of a memory integrated circuit (“IC”). The apparatus and systems may include a thermal sensor on a memory IC, and a heating element coupled to the thermal sensor. The heating element is adapted to heat the memory IC in response to a signal from the thermal sensor. Other aspects are also provided.

Claims (28)

1. Apparatus comprising:

a thermal sensor on a memory integrated circuit (“IC”);

a heating element coupled to the thermal sensor and adapted to heat the memory IC in response to a signal from the thermal sensor; and

a circuit adapted to enable the apparatus only on detection of an error condition on the memory IC, or when the memory IC is used with a line power supply.

2. The apparatus of claim 1 , wherein the thermal sensor includes a current output temperature sensor.

3. The apparatus of claim 1 , wherein the thermal sensor includes at least one of a voltage output sensor, a Brokaw cell, a bi-polar junction transistor-based temperature sensor, a thermocouple, a resistance temperature device, and a thermistor.

4. The apparatus of claim 1 , wherein the thermal sensor is integrated in the memory IC.

5. The apparatus of claim 1 , wherein the thermal sensor includes a plurality of thermal sensors distributed on the memory IC.

6. The apparatus of claim 1 , wherein the heating element includes a resistive heating element.

7. The apparatus of claim 1 , wherein the heating element is integrated in the memory IC.

8. The apparatus of claim 1 , wherein the heating element includes a plurality of heating elements distributed on the memory IC.

9. The apparatus of claim 1 , further including a circuit coupled to the heating element and the thermal sensor and adapted to allow a temperature value to be selected as a threshold below which the heating element is activated.

10. A system comprising:

a non-volatile memory array on an integrated circuit (“IC”);

a thermal regulation circuit integrated on the IC, wherein the thermal regulation circuit is adapted to maintain the memory array at a predefined threshold temperature; and

a circuit adapted to enable the apparatus only on detection of an error condition on the memory IC, or when the memory IC is used with a line power supply.

11. The system of claim 10 , wherein the non-volatile memory array includes a three dimensional memory array.

12. The system of claim 11 , wherein the thermal regulation circuit is disposed on multiple planes of the three dimensional memory array.

13. The system of claim 10 , wherein the thermal regulation circuit includes a thermal sensor and a heating element coupled to the thermal sensor.

14. The system of claim 13 , wherein the non-volatile memory array includes a three dimensional memory array, and the thermal sensor and the heating element are disposed on different planes of the three dimensional memory array.

15. Apparatus for thermal regulation of a non-volatile three dimensional memory IC, the apparatus comprising:

a current output temperature sensor integrated into a non-volatile three dimensional memory IC;

a resistive heating element coupled to the current output temperature sensor and adapted to heat the memory IC in response to a signal from the current output temperature sensor indicating that the memory IC is at a temperature below a desired threshold temperature; and

a circuit adapted to enable the apparatus only on detection of an error condition on the memory IC, or when the memory IC is used with a line power supply.

16. The apparatus of claim 15 , wherein the current output temperature sensor includes a plurality of current output temperature sensors distributed on the three dimensional memory IC.

17. The apparatus of claim 15 , wherein the current output temperature sensor is disposed on multiple planes of the three dimensional memory array.

18. The apparatus of claim 15 , wherein the resistive heating element includes a plurality of resistive heating elements distributed on the three dimensional memory IC.

19. The apparatus of claim 15 , wherein the resistive heating element is disposed on multiple planes of the three dimensional memory array.

Assignments (3)
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0850 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT LISTED PATENT NUMBER 8853569 TO THE CORRECT PATENT NUMBER 8883569 PREVIOUSLY RECORDED ON REEL 038300 FRAME 0665. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 25, 2016
From: SANDISK 3D LLC
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038520/0552 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2016
From: SANDISK 3D LLC.
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038300/0665 →
Continuity (3)
Division 12828846 · Jul 1, 2010
Continuation 11772097 · Jun 29, 2007
Related Publication 20110292751A1 · Dec 1, 2011