Semiconductor device and control method of the same
View Patent ↗The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit connected to a core cell provided in a nonvolatile memory cell array, a second current-voltage conversion circuit connected to a reference cell through a reference cell data line, a sense amplifier sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
1. A wireless communications device, said wireless communications device comprising:
a flash memory comprising:
a first current-voltage conversion circuit connected to a core cell provided in a nonvolatile memory cell array;
a second current-voltage conversion circuit connected to a reference cell through a reference cell data line, wherein the second current-voltage conversion circuit comprises an average circuit operable to average outputs from multiple reference cells;
a sense amplifier sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit;
a compare circuit comparing a voltage level at the reference cell data line with a predefined voltage level; and
a charging circuit charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line;
a processor;
a communications component;
a transmitter;
a receiver; and
an antenna connected to the transmitter circuit and the receiver circuit.
2. The flash memory of claim 1 , wherein the second current-voltage conversion circuit outputs an output from the average circuit.
3. The flash memory of claim 1 , wherein:
the second current-voltage conversion circuit has a differential circuit to which the voltage level at the reference cell data line and the predefined voltage level are input;
the compare circuit has a first FET having a gate connected to an output from the differential circuit and a source and drain connected to a voltage source and an output node and a second FET having a gate connected to a gate of a current source FET in the differential circuit and a source and a drain connected to the output node and a ground level; and
an output of the compare circuit is connected to the output node.
4. The flash memory of claim 1 , wherein the average circuit has a first average circuit outputting to the first current-voltage conversion circuit, and a second average circuit outputting an output thereof to the sense amplifier.
5. The wireless communications device of claim 1 , wherein said flash memory is NAND flash memory.
6. The wireless communications device of claim 1 , wherein said flash memory is NOR flash memory.
7. The wireless communications device of claim 1 , wherein said flash memory utilizes mirrorbits technology.
8. A portable media player comprising:
a processor;
a cache;
a user input component;
a coder-decoder component; and
a memory comprising:
a flash memory comprising:
a first current-voltage conversion circuit connected to a core cell provided in a nonvolatile memory cell array;
a second current-voltage conversion circuit connected to a reference cell through a reference cell data line, wherein the second current-voltage conversion circuit comprises an average circuit operable to average outputs from multiple reference cells;
a sense amplifier sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit;
a compare circuit comparing a voltage level at the reference cell data line with a predefined voltage level; and
a charging circuit charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line.
9. The portable media player of claim 8 , wherein said portable media player is a portable music player.
10. The portable media player of claim 8 , wherein said portable media player is a portable video player.
11. The flash memory of claim 8 , wherein the second current-voltage conversion circuit outputs an output from the average circuit.
12. The flash memory of claim 8 , wherein:
the second current-voltage conversion circuit has a differential circuit to which the voltage level at the reference cell data line and the predefined voltage level are input;
the compare circuit has a first FET having a gate connected to an output from the differential circuit and a source and drain connected to a voltage source and an output node and a second FET having a gate connected to a gate of a current source FET in the differential circuit and a source and a drain connected to the output node and a ground level; and
an output of the compare circuit is connected to the output node.
13. The flash memory of claim 8 , wherein the average circuit has a first average circuit outputting to the first current-voltage conversion circuit, and a second average circuit outputting an output thereof to the sense amplifier.