Packaged semiconductor die with power rail pads
A packaged semiconductor die has a die support mounting surface mounted to a die support having external connectors. A die connection pad surface opposite to die supporting mount surface has associated die connection pads that are circuit nodes of the semiconductor die. The die connection pad surface also has a power rail pad. The power rail pad has a surface area larger than surface areas of the die connection pads. Bond wires electrically couple the power rail pad to two or more of the die connection pads.
1. A semiconductor die package, comprising:
a semiconductor die support having external connectors;
a semiconductor die mounted to the die support, the semiconductor die having a die support mounting surface attached to the die support and an opposite die connection pad surface with associated die connection pads, wherein the connection die pads are circuit nodes of the semiconductor die;
at least one power rail pad on the die connection pad surface, the power rail pad having a larger surface area than surface areas of the die connection pads; and
die wire bonds electrically coupling the power rail pad to at least two of the die connection pads.
2. The semiconductor die package of claim 1 , wherein the at least one power rail pad includes a first power rail pad and a second power rail pad each individually coupled by the die wire bonds to at least two of the die connection pads.
3. The semiconductor die package of claim 2 , wherein the die connection pads include positive voltage supply rail die connection pads, and wherein the die wire bonds electrically couple the first power rail pad to at least two of the positive voltage supply rail die connection pads.
4. The semiconductor die package of claim 3 , wherein power rail wire bonds directly electrically couple the first power rail pad to at least one of the external connectors.
5. The semiconductor die package of claim 4 , wherein the die connection pads include ground supply rail die connection pads and wherein the die wire bonds electrically couple the second power rail pad to at least two of the ground supply rail die connection pads.
6. The semiconductor die package of claim 5 , wherein power rail wire bonds electrically couple the second power rail pad to at least one of the external connectors.
7. The semiconductor die package of claim 4 , wherein the die connection pads include ground supply rail die connection pads and wherein the die wire bonds electrically couple the second power rail pad to at least two of the ground supply rail die connection pads, and wherein the power rail wire bonds electrically couple the second power rail pad to at least one of the external connectors.
8. The semiconductor die package of claim 7 , wherein the die connection pads are adjacent respective edges of the semiconductor die and include data input and output pads for the semiconductor die, the data input and output pads being electrically connected by data wire bonds to the external connectors.
9. The semiconductor die package of claim 8 , wherein the power rail wire bonds are least twice the diameter of data wire bonds.
10. The semiconductor die package of claim 2 , wherein the first power rail pad is a frame that encloses the second power rail pad.
11. The semiconductor die package of claim 1 , wherein the die connection pads are integral with the semiconductor die and wherein the power rail pad is a non-circuit node of the semiconductor die.
12. The semiconductor die package of claim 1 , wherein the semiconductor die support is a non-conductive substrate.
13. The semiconductor die package of claim 1 , wherein the semiconductor die support is a lead frame.
14. The semiconductor die package of claim 1 , further including an encapsulating material covering the semiconductor die and die wire bonds.
15. A semiconductor die, comprising:
a die support mounting surface and an opposite die connection pad surface with associated die connection pads, wherein the die connection pads are circuit nodes of the semiconductor die; and
at least one power rail pad on the die connection pad surface, the power rail pad having a surface area larger than surface areas of the die connection pads,
wherein the die connection pads are integral with the semiconductor die and wherein the power rail pad is a non-circuit node of the semiconductor die.
16. The semiconductor die of claim 15 , wherein the least one power rail pad includes a first power rail pad and a second power rail pad, wherein the first power rail pad is a frame that encloses the second power rail pad.
17. The semiconductor die of claim 15 , further comprising die wire bonds electrically coupling the power rail pad to at least two of the die connection pads.
18. The semiconductor die of claim 17 , wherein the least one power rail pad includes a first power rail pad and a second power rail pad, each individually coupled by the die wire bonds to at least two of the die connection pads.
19. A method for assembling a semiconductor die package, the method including:
providing a semiconductor die support with external connectors;
providing a semiconductor die with a die support mounting surface and an opposite die connection pad surface with associated die connection pads, the connection pads being circuit nodes of the semiconductor die, wherein there is at least one power rail pad on the die connection pad surface, the power rail pad having a surface area larger than surface areas of the die connection pads;
mounting the semiconductor die to the die support at the die support mounting surface;
electrically coupling the power rail pad to at least two of the die connection pads by die wire bonds;
electrically coupling the power rail pad to at least one of the external connectors by power rail wire bonds;
electrically coupling some of the die connection pads to the external connectors by data wire bonds; and
encapsulating the semiconductor die, power rail wire bonds, die wire bonds and data wire bonds.
20. The method for assembling a semiconductor die package of claim 19 , wherein the die connection pads are integral with the semiconductor die, and wherein the power rail pad is a non-circuit node of the semiconductor die.