Deposited semiconductor structure to minimize N-type dopant diffusion and method of making
View Patent ↗A memory cell is provided that includes a semiconductor pillar and a reversible resistance-switching element coupled to the semiconductor pillar. The semiconductor pillar includes a heavily doped bottom region of a first conductivity type, a heavily doped top region of a second conductivity type, and a lightly doped or intrinsic middle region interposed between and contacting the top and bottom regions. The middle region includes a first proportion of germanium greater than a proportion of germanium in the top region and/or the bottom region. The reversible resistivity-switching element includes a material selected from the group consisting of NiO, Nb 2 O 5 , TiO 2 , HfO 2 , Al 2 O 3 , CoO, MgO x , CrO 2 , VO, BN, and AlN. Numerous other aspects are provided.
1. A memory cell comprising:
a reversible resistivity-switching element comprising a material selected from the group consisting of NiO, Nb 2 O 5 , TiO 2 , HfO 2 , Al 2 O 3 , CoO, MgO x , CrO 2 , VO, BN, and AlN; and
a semiconductor pillar coupled to the reversible resistivity-switching element, the semiconductor pillar comprising:
a heavily doped bottom region of a first conductivity type;
a heavily doped top region of a second conductivity type; and
a lightly doped or intrinsic middle region interposed between and contacting the top and bottom regions,
wherein the middle region comprises a first proportion of germanium greater than a proportion of germanium in the top region and/or the bottom region.
2. The memory cell of claim 1 , wherein the top, middle, and bottom regions form a junction diode.
3. The memory cell of claim 1 , wherein the top region comprises a second proportion of germanium less than the first proportion of germanium.
4. The memory cell of claim 1 , wherein the top region comprises no germanium.
5. The memory cell of claim 1 , wherein the bottom region comprises a second proportion of germanium less than the first proportion of germanium.
6. The memory cell of claim 1 , wherein the bottom region comprises no germanium.
7. A memory cell comprising:
a first conductor extending in a first direction;
a second conductor extending in a second direction different from the first direction;
a reversible resistivity-switching element disposed between the first conductor and the second conductor, the reversible resistivity-switching element comprising a material selected from the group consisting of NiO, Nb 2 O 5 , TiO 2 , HfO 2 , Al 2 O 3 , CoO, MgO x , CrO 2 , VO, BN, and AlN; and
a semiconductor pillar vertically coupled to the reversible resistivity-switching element, the pillar comprising:
a bottom heavily doped region of a first conductivity type;
a top heavily doped region of a second conductivity type; and
a middle intrinsic or lightly doped region interposed between and in contact with the top and bottom regions,
wherein the top region comprises a first proportion of silicon greater than a proportion of silicon in the middle region and/or the bottom region.
8. The memory cell of claim 7 , wherein the middle region comprises no silicon.
9. The memory cell of claim 8 , wherein the middle region comprises germanium.
10. The memory cell of claim 7 , wherein the middle region comprises carbon.
11. The memory cell of claim 7 , wherein the first proportion of silicon is at least 80 atomic percent.
12. A memory cell comprising:
a bottom conductor extending in a first direction;
a reversible resistivity-switching element over the bottom conductor, the reversible resistivity-switching element comprising a material selected from the group consisting of NiO, Nb 2 O 5 , TiO 2 , HfO 2 , Al 2 O 3 , CoO, MgO x , CrO 2 , VO, BN, and AlN;
a polycrystalline or amorphous semiconductor junction diode coupled to the reversible resistivity-switching element, the junction diode comprising silicon and germanium, wherein a germanium content varies throughout the junction diode; and
a top conductor over the junction diode, the top conductor extending in a second direction different from the first direction.
13. The memory cell of claim 12 , wherein the diode comprises:
a first heavily doped region;
a second region formed on and in contact with the first region; and
a third heavily doped region formed on and in contact with the second region.
14. The memory cell of claim 13 , wherein a germanium content of the second region is greater than a germanium content of the first region.
15. The memory cell of claim 14 , wherein the first region is doped with p-type dopants.
16. The memory cell of claim 14 , wherein the first region is doped with n-type dopants.
17. The memory cell of claim 14 , wherein the second region is lightly doped or intrinsic.
18. The memory cell of claim 13 , wherein a germanium content of the second region is greater than a germanium content of the third region.
19. The memory cell of claim 13 , wherein at least the top or the bottom conductor comprises a metal.
20. The memory cell of claim 19 , wherein at least the top or the bottom conductor comprises tungsten.