Passivation of back-illuminated image sensor
A method for forming a back-illuminated image sensor includes forming a higher doped crystalline layer on a crystalline substrate, growing a lower doped crystalline layer on the higher doped crystalline layer and forming a photodiode and component circuitry from the lower doped crystalline layer. Metallization structures are formed to make connections to and between components. The crystalline substrate is removed to expose the higher doped crystalline layer. An optical component structure is provided on an exposed surface of the higher doped crystalline layer to receive light therein such that the higher doped crystalline layer provides a passivation layer for the photodiode and the component circuitry.
1. A method for forming a back-illuminated image sensor, comprising:
forming a higher doped crystalline layer on a crystalline substrate;
growing a lower doped crystalline layer on the higher doped crystalline layer;
forming a photodiode and component circuitry including patterning the lower doped crystalline layer;
forming metallization structures to make connections to and between components;
removing the crystalline substrate to expose the higher doped crystalline layer; and
providing an optical component structure on an exposed surface of the higher doped crystalline layer to receive light therein such that the higher doped crystalline layer provides a passivation layer for at least one of the photodiode and the component circuitry.
2. The method as recited in claim 1 , wherein forming the higher doped crystalline layer on the crystalline substrate includes epitaxially growing the higher doped crystalline layer from in-situ doped Si.
3. The method as recited in claim 1 , wherein the higher doped crystalline layer includes a same doping conductivity type as the lower doped crystalline layer to repel minority carriers.
4. The method as recited in claim 1 , wherein the higher doped crystalline layer includes a different doping conductivity type from the lower doped crystalline layer to form an electrically floating layer.
5. The method as recited in claim 1 , wherein the higher doped crystalline layer acts as an etch stop layer.
6. The method as recited in claim 1 , wherein forming metallization structures includes forming a contact to a surface of the higher doped crystalline layer to provide a connection for flip chip bonding.
7. The method as recited in claim 1 , wherein removing the crystalline substrate includes at least one of: smart cutting, spalling, grinding, and etching the substrate.
8. The method as recited in claim 1 , wherein providing an optical component structure includes at least one of a color filter layer and a layer of microlenses.
9. The method as recited in claim 1 , wherein providing an optical component structure includes forming at least one additional passivation layer on the higher doped crystalline layer.
10. The method as recited in claim 1 , further comprising forming a support substrate and a dielectric material, the dielectric material disposed between the support substrate and the optical component structure.
11. The method as recited in claim 10 , wherein forming the metallization structures include tapered contacts having a larger thickness closer to the support substrate and a thinner thickness closer to the optical component structure.
12. The method as recited in claim 1 , wherein the higher doped crystalline layer includes a photodiode portion and a component circuitry portion separated to form a gap.
13. The method as recited in claim 12 , further comprising forming a dielectric material in the gap between the photodiode and component circuitry portions of the higher doped crystalline layer.