Devices with arbitrated interface busses, and methods of their operation
A system having an arbitrated interface bus and a method of operating the same are provided. The system may include, but is not limited to, one or more registers configured to store data, a plurality of external interfaces configured to receive data access requests for the register(s), an arbitrator communicatively coupled to each of the plurality of external interfaces, and an interface bus communicatively coupled between the arbitrator and the register(s), wherein the arbitrator is configured to arbitrate control of the interface bus between the plurality of external interfaces.
1. A device, comprising:
data storage including one or more registers configured to store data;
a plurality of external interfaces, each of the plurality of external interfaces configured to receive substantially simultaneously during a first communication interval a data access request for access to the one or more registers, the data access requests comprising one of a read request to the one or more registers and a write request to the one or more registers;
an arbitrator communicatively coupled to each of the plurality of external interfaces; and
an interface bus communicatively coupled between the arbitrator and the one or more registers,
wherein the arbitrator is configured to arbitrate control of the interface bus between the plurality of external interfaces during a first single processing interval subsequent to the first communication interval to complete each write request and retrieve data for each read request during the first single processing interval, and
wherein the plurality of external interfaces are configured to substantially simultaneously transmit the retrieved data for each read request during a second communication interval subsequent to the first single processing interval.
2. The device according to claim 1 , wherein the arbitrator is configured to arbitrate control of the interface bus between the plurality of external interfaces based upon a priority assigned to each of the plurality of external interfaces.
3. The device according to claim 1 , wherein the arbitrator is configured to arbitrate control of the interface bus between the plurality of external interfaces based upon a priority level received with each respective data access request.
4. The device according to claim 1 , further comprising:
an error detection system communicatively coupled to the arbitrator,
wherein the arbitrator is configured to arbitrate control of the interface bus to the error detection system based upon a priority assigned to the error detection system.
5. The device according to claim 1 , wherein a length of each communication interval is fixed and a length of the each single processing interval is variable based upon a number of external interfaces simultaneously accessing the device.
6. The device according to claim 1 , further comprising an error detection system communicatively coupled to the arbitrator, wherein the arbitrator is configured to arbitrate control of the interface bus to the error detection system during the communication interval.
7. The device according to claim 1 , further comprising a test interface communicatively coupled to the arbitrator, wherein the arbitrator is configured to arbitrate control of the interface bus to the test interface based upon a priority assigned to the test interface.
8. The device according to claim 1 , wherein the plurality of external interfaces are each configured to receive data access requests from a different external controller.
9. A method for controlling access to an interface bus in a device, comprising:
receiving, by an arbitrator, multiple data access requests to access one or more registers through the interface bus from multiple components selected from a first external interface, a second external interface, an error detection system, and a test interface, the first external interface and the second external interface configured to receive data access requests substantially simultaneously during a first communication interval, the data access requests comprising one of a read request to the one or more registers and a write request to the one or more registers;
arbitrating, by the arbitrator, access to the interface bus based upon priorities associated with each of the multiple components, wherein during a first single processing interval subsequent to the first communication interval the arbitrator arbitrates control to the interface bus to complete each write request from the first external interface and the second external interface and retrieves data for each read request from the first external interface and the second external interface, and
transmitting, substantially simultaneously by the first external interface and the second external interface, the retrieved data for each read request received by the first external interface and the second external interface during a second communication interval subsequent to the first single processing interval.
10. The method according to claim 9 , further comprising receiving, by the arbitrator, a select signal having a first interval and a second interval.
11. The method according to claim 10 , further comprising:
arbitrating, by the arbitrator, control of the interface bus to the error detection system and the test interface during the first communication interval; and
arbitrating, by the arbitrator, control of the interface bus to the first external interface and the second external interface during the first single processing interval when the arbitrator receives a data access request from the first external interface or the second external interface during the first interval.
12. The method according to claim 9 , further comprising:
receiving, by the first external interface, a first data access request from a first external controller; and
receiving, by the second external interface, a second data access request from a second external controller,
wherein the first external controller is different than the second external controller.
13. The method according to claim 12 , further comprising:
sending, by the first external interface, first data in response to the first data access request to the first external controller; and
sending, by the second external interface, second data in response to the second data request to the second external controller.
14. A redundant safety system, comprising:
a first controller configured to enable a safety device;
a second controller configured to activate the safety device; and
a sensor communicatively coupled to the first controller and the second controller, the sensor comprising:
data storage including one or more registers configured to store sensor data;
a first external interface configured to receive data access requests for sensor data from the first controller;
a second external interface configured to receive requests data access for sensor data from the second controller, the first external interface and the second external interface configured to receive data access requests substantially simultaneously during a first communication interval, the data access requests comprising one of a read request to the one or more registers and a write request to the one or more registers;
an arbitrator communicatively coupled to the first external interface and the second external interface; and
an interface bus communicatively coupled between the arbitrator and the one or more registers,
wherein the arbitrator is configured to arbitrate control of the interface bus between the first external interface and the second external interface during a first single processing interval subsequent to the first communication interval to complete each write request and retrieve data for each read request during the first single processing interval, and
wherein the first external interface and the second external interface are configured to substantially simultaneously transmit the retrieved data for each read request during a second communication interval subsequent to the first single processing interval.
15. The redundant safety system according to claim 14 , wherein the arbitrator is configured to arbitrate control of the interface bus between the first external interface and the second external interface based upon a priority assigned to each of the first external interface and the second external interface.
16. The redundant safety system according to claim 14 , wherein the sensor further comprises:
an error detection system communicatively coupled to the arbitrator,
wherein the arbitrator is configured to arbitrate control of the interface bus to the error detection system based upon a priority assigned to the error detection system.
17. The redundant safety system according to claim 14 , wherein a length of the each communication interval is fixed and a length of the each single processing interval is variable based upon a number of external interfaces simultaneously accessing the sensor.