IP Library Granted Patent US 9,368,587
Granted Patent B2
US 9,368,587 · App. 14/292,894 · Granted Jun 14, 2016

Accumulation-mode field effect transistor with improved current capability

Inventors: Christopher Boguslaw Kocon (Mountain Top, PA); Praveen Muraleedharan Shenoy (Wilkes Barre, PA)
Assignee: Fairchild Semiconductor Corporation
H01L29/407H01L21/3065H01L21/30655H01L21/31116H01L21/6835H01L29/0623H01L29/0634H01L29/0661H01L29/0696H01L29/402H01L29/4236H01L29/66348H01L29/66734H01L29/7396H01L29/7802H01L29/7804H01L29/7805H01L29/7806H01L29/7811H01L29/7813H01L29/7815H01L29/7828H01L29/7831H01L21/26586H01L23/4952H01L23/49816H01L29/0653H01L29/1095H01L29/165H01L29/41766H01L29/4238H01L29/42368H01L29/495H01L29/4933H01L2221/6834H01L2221/68363H01L2224/16H01L2924/01012H01L2924/01019H01L2924/01078H01L2924/10253H01L2924/12032H01L2924/1301H01L2924/1305H01L2924/13034H01L2924/13055H01L2924/13091H01L2924/1532H01L2924/15311H01L2924/19041H01L2924/3011H01L2924/3025H01L2924/30105H02M3/00H02M3/33592H02M7/48Y02B70/1475
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Quick Facts
Patent No.
US 9,368,587
App. No.
14/292,894
Granted
Jun 14, 2016
Kind
B2
Abstract

An accumulation-mode field effect transistor including a plurality of gates. The accumulation-mode field effect transistor including a semiconductor region including a channel region adjacent to but insulated from each of the plurality of gates.

Claims (37)

1. An accumulation-mode field effect transistor, comprising:

a plurality of gates;

a semiconductor region including a plurality of channel regions adjacent to but insulated from each of the plurality of gates, and a drift region,

the plurality of channel regions and the drift region being of a first conductivity type;

a drain terminal and a source terminal configured so that when the accumulation-mode field effect transistor is in the on state a current flows from the drain terminal to the source terminal through the drift region and the channel regions; and

a plurality of insulation-filled trenches extending into the semiconductor region adjacent to the drift region, at least one sidewall of each insulation-filled trench being lined with silicon material of a second conductivity type opposite the first conductivity type.

2. The accumulation-mode field effect transistor of claim 1 , wherein the sidewalls and bottom of each insulation-filled trench is lined with silicon material of the second conductivity type.

3. The accumulation-mode field effect transistor of claim 1 , wherein opposite sidewalls of each insulation-filled trench are lined with opposite conductivity type silicon material.

4. The accumulation-mode field effect transistor of claim 1 , further comprising:

a plurality of gate trenches extending in the semiconductor region, each of the plurality of gate trenches having one of the plurality of gates disposed therein, the plurality of gate trenches and insulation-filled trenches being alternately arranged so that each of the plurality of channel region separates one insulation-filled trench from an adjacent gate trench, the plurality of insulation-filled trenches extending deeper in the semiconductor region than the plurality of gate trenches.

5. The accumulation-mode field effect transistor of claim 4 , wherein each of the plurality of channel regions includes a plurality of regions of the second conductivity type, each of the plurality of regions of the second conductivity type laterally extending to abut the insulation-filled trench and the gate trench between which each of the plurality of regions of the second conductivity type are located.

6. The accumulation-mode field effect transistor of claim 4 , wherein each of the plurality of channel regions includes a region of the first conductivity type, each of the regions laterally extending to abut at least one of the insulation-filled trench and at least one of the gate trenches, each of the regions having a doping concentration higher than that of the plurality of channel regions.

7. The accumulation-mode field effect transistor of claim 4 , wherein each of the plurality of channel regions includes a first region of the first conductivity type and a second region of the first conductivity type, the first regions and the second regions each having a doping concentration higher than that of the plurality of channel regions.

8. An accumulation-mode field effect transistor, comprising:

a gate;

a semiconductor region including:

a channel region adjacent to but insulated from the gate, and

a drift region, the channel region and the drift region having of a first conductivity type;

a drain terminal and a source terminal configured so that when the accumulation-mode field effect transistor is in the on state a current flows from the drain terminal to the source terminal through the drift region and the channel region; and

a trench extending into the semiconductor region adjacent to the drift region, a sidewall of the trench being lined with a silicon material of a second conductivity type opposite the first conductivity type.

9. The accumulation-mode field effect transistor of claim 8 , wherein a bottom of the trench is lined with the silicon material of the second conductivity type.

10. The accumulation-mode field effect transistor of claim 8 , wherein the trench is an insulation-filled trench.

11. The accumulation-mode field effect transistor of claim 8 , wherein the sidewall is a first sidewall of trench,

the accumulation-mode field effect transistor further comprising:

a second sidewall of the trench lined with a silicon material of a the first conductivity type.

12. The accumulation-mode field effect transistor of claim 8 , further comprising:

a gate trench extending in the semiconductor region, the gate trench having the gate disposed therein, the trench being an insulation-filled trench adjacent to the gate trench, the insulation-filled trench extending deeper in the semiconductor region than the gate trench.

13. The accumulation-mode field effect transistor of claim 12 , wherein the channel region includes a region of the second conductivity type, the region of the second conductivity type laterally extending to and abutting the insulation-filled trench and the gate trench.

14. An accumulation-mode field effect transistor, comprising:

a gate trench including a gate disposed therein;

a semiconductor region including:

a channel region adjacent to but insulated from the gate, and

a drift region, the channel region and the drift region of a first conductivity type;

a drain terminal and a source terminal configured so that when the accumulation-mode field effect transistor is in the on state a current flows from the drain terminal to the source terminal through the drift region and the channel region; and

a trench extending into the semiconductor region adjacent to the drift region, the trench having a depth within the semiconductor region greater than a depth of the gate trench, the trench having a sidewall lined with a dielectric.

15. The accumulation-mode field effect transistor of claim 14 , wherein the trench includes at least one diode.

16. The accumulation-mode field effect transistor of claim 14 , wherein a dielectric layer is not disposed along a bottom of the trench such that a bottom region of the trench is in electric contact with the drift region.

Assignments (9)
SECURITY INTEREST Recorded Jul 13, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; GTAT CORPORATION
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064271/0971 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 065653/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 040075, FRAME 0644 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0536 →
SECURITY INTEREST Recorded Nov 12, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058871/0799 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2021
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 057969/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057694/0374 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2016
From: SHENOY, PRAVEEN MURALEEDHARAN
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 039981/0585 →
PATENT SECURITY AGREEMENT Recorded Sep 19, 2016
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 040075/0644 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2014
From: CHALLA, ASHOK; ELBANHAWY, ALAN; GREBS, THOMAS E.; KRAFT, NATHAN L.; PROBST, DEAN E.; RIDLEY, RODNEY S.; SAPP, STEVEN P.; WANG, QI; YUN, CHONGMAN; LEE, J.G.; WILSON, PETER H.; YEDINAK, JOSEPH A.; JUNG, J.Y.; JANG, H.C.; SANI, BABAK S.; STOKES, RICHARD; DOLNY, GARY M.; MYTYCH, JOHN; LOSEE, BECKY; SELSLEY, ADAM; HERRICK, ROBERT; MURPHY, JAMES J.; MADSON, GORDON K.; MARCHANT, BRUCE D.; REXER, CHRISTOPHER L.; KOCON, CHRISTOPHER B.; WOOLSEY, DEBRA S
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 033833/0697 →
Continuity (7)
Continuation 13418128 · Mar 12, 2012
Division 12032599 · Feb 15, 2008
Continuation 11026276 · Dec 29, 2004
Continuation In Part 10640742 · Aug 14, 2003
Continuation In Part 10442670 · May 20, 2003
Provisional Application 60533790 · Dec 30, 2003
Related Publication 20140264573A1 · Sep 18, 2014