Switching scheme to extend maximum input voltage range of a DC-to-DC voltage converter
A circuit includes a first transistor having a first current electrode coupled to a first power supply node, a second current electrode coupled to a switching node; a second transistor having a first current electrode coupled to the switching node, a second current electrode coupled to a second power supply node; an inductor having a first terminal coupled to the switching node, a second terminal coupled to an output node; a third transistor having a first current electrode coupled to the output node, a second current electrode coupled to the switching node; a driver circuit configured to transition the switching node from a first voltage to a second voltage by turning on the third transistor to couple the output node to the switching node during a first time period, turning on the first transistor to couple the first power supply node to the switching node during a second time period.
1. An integrated circuit comprising:
a first transistor having a control electrode, a first current electrode coupled to a first power supply node, and a second current electrode coupled to a switching node;
a second transistor having a control electrode, a first current electrode coupled to the switching node, and a second current electrode coupled to a second power supply node;
an inductor having a first terminal coupled to the switching node, and a second terminal coupled to an output node;
a third transistor having a first current electrode coupled to the output node, a control electrode, and a second current electrode coupled to the switching node; and
a driver circuit configured to transition the switching node from a first voltage to a second voltage by being further configured to:
turn on the third transistor to couple the output node to the switching node during a first time period to transition the switching node from the first voltage to a third voltage which has a value between the first and second voltages, and
turn off the third transistor to decouple the output node from the switching node and turn on the first transistor to couple the first power supply node to the switching node during a second time period subsequent to the first time period to transition the switching node from the third voltage to the second voltage.
2. The integrated circuit of claim 1 , wherein the first voltage is a voltage at the second power supply node and the second voltage is a voltage at the first power supply node.
3. The integrated circuit of claim 1 , wherein the driver circuit is configured to transition the switching node from the second voltage to the first voltage by being further configured to:
turn off the first transistor to decouple the first power supply node from the switching node and turn on the third transistor to couple the output node to the switching node during a third time period subsequent to the second time period to transition the switching node from the second voltage to the third voltage, and
turn off the third transistor to decouple the output node from the switching node and turn on the second transistor to couple the second power supply node to the switching node during a fourth time period subsequent to the third time period to transition the switching node from the third voltage to the first voltage.
4. The integrated circuit of claim 3 , wherein the first, second, third, and fourth time periods are non-overlapping.
5. The integrated circuit of claim 1 , wherein the driver circuit is configured to:
prior to turning on the third transistor during the first time period, turn off the second transistor.
6. The integrated circuit of claim 1 , wherein the first and second time periods are non-overlapping.
7. The integrated circuit of claim 1 , wherein a voltage difference between the second voltage and the third voltage is less than a maximum voltage supported by process technology of the integrated circuit, and a voltage difference between the first voltage and the third voltage is less than the maximum voltage.
8. The integrated circuit of claim 1 , wherein the first power supply node is further characterized as a positive battery node.
9. The integrated circuit of claim 1 , wherein the second power supply node is further characterized as a ground node.
10. The integrated circuit of claim 1 , further comprising a capacitor having a first terminal coupled to the output node and a second terminal coupled to the second power supply node.
11. An integrated circuit comprising:
a first transistor having a control electrode, a first current electrode coupled to a first power supply node, and a second current electrode coupled to a switching node;
a second transistor having a control electrode, a first current electrode coupled to the switching node, and a second current electrode coupled to a second power supply node;
a third transistor having a first current electrode coupled to a third power supply node, a control electrode, and a second current electrode coupled to the switching node; and
a driver circuit configured to transition the switching node from a first voltage to a second voltage by being further configured to:
turn on the third transistor to couple the third power supply node to the switching node during a first time period to transition the switching node from the first voltage to a third voltage which has a value between the first and second voltages, and
turn off the third transistor to decouple the third power supply node from the switching node and turn on the first transistor to couple the first power supply node to the switching node during a second time period subsequent to the first time period to transition the switching node from the third voltage to the second voltage.
12. The integrated circuit of claim 11 , wherein the first voltage is a voltage at the second power supply node and the second voltage is a voltage at the first power supply node.
13. The integrated circuit of claim 11 , wherein the driver circuit is configured to:
prior to turning on the third transistor during the first time period, turn off the second transistor.
14. The integrated circuit of claim 11 , wherein the first power supply node is further characterized as a positive battery node.
15. The integrated circuit of claim 11 , wherein the second power supply node is further characterized as a ground node.
16. A method of transitioning a voltage at a switching node from a first voltage to a second voltage, the method comprising:
coupling a first power supply node to the switching node by way of a first transistor to transition the switching node from the first voltage to a third voltage which has a value between the first and second voltages;
decoupling the first power supply node from the switching node; and
coupling a second power supply node to the switching node by way of a second transistor to transition the switching node from the third voltage to the second voltage.
17. The method of claim 16 , further comprising:
decoupling the second power supply node from the switching node;
coupling the first power supply node to the switching node by way of the first transistor to transition the switching node from the second voltage to the third voltage;
decoupling the first power supply node from the switching node; and
coupling a third power supply node to the switching node by way of a third transistor to transition the switching node from the third voltage to the first voltage.
18. The integrated circuit of claim 11 , wherein the driver circuit is configured to transition the switching node from the second voltage to the first voltage by being further configured to:
turn off the first transistor to decouple the first power supply node from the switching node and turn on the third transistor to couple the output node to the switching node during a third time period subsequent to the second time period to transition the switching node from the second voltage to the third voltage, and
turn off the third transistor to decouple the output node from the switching node and turn on the second transistor to couple the second power supply node to the switching node during a fourth time period subsequent to the third time period to transition the switching node from the third voltage to the first voltage.
19. The integrated circuit of claim 1 , wherein
during the first time period, a transition voltage at the switching node increases from the first voltage to the third voltage, and
during the second time period, a transition voltage at the switching node increases from the third voltage to the second voltage.
20. The integrated circuit of claim 1 , wherein
during the first time period, a transition voltage at the switching node decreases from the first voltage to the third voltage, and
during the second time period, a transition voltage at the switching node decreases from the third voltage to the second voltage.