Substrate for alternative semiconductor die configurations
A method of assembling semiconductor devices with semiconductor dies of alternative different configurations uses the same substrate panel. The dies of the selected configuration are placed in an array, mounted, and connected to internal electrical contact pads on a first face of the panel using main fiducial markings and an array of subsidiary fiducial markings corresponding universally to arrays of semiconductor dies of the different alternative configurations. The pitch of the subsidiary fiducial markings is equal to the spacing between adjacent rows of the internal electrical contact pads on the panel and is a sub-multiple of the pitch of the array of dies.
1. A method of assembling semiconductor devices with semiconductor dies of alternative configurations, the method comprising:
providing a substrate panel having an array of internal electrical contact elements on a first face for connection to the semiconductor dies, fiducial markings on the first face for guiding apparatus performing operations on the first face of the substrate panel, and an array of external electrical contact elements on a second face, opposite the first face, for connection to external electrical circuitry, wherein the internal and external electrical contact elements are aligned and electrically connected through the substrate panel by respective vias;
placing and mounting an array of semiconductor dies of a selected configuration on the first face of the substrate panel using the fiducial markings, each of the semiconductor dies having bonding pads;
electrically connecting the internal electrical contact elements of the substrate panel with the bonding pads of the semiconductor dies; and
singulating the substrate panel with the semiconductor dies using the fiducial markings;
wherein the fiducial markings include main fiducial markings located proximate to an outer perimeter of the substrate panel and at corners thereof, and an array of subsidiary fiducial markings corresponding to arrays of semiconductor dies of the different alternative configurations, wherein the array of subsidiary fiducial markings extends in two orthogonal dimensions and has a pitch that is a sub-multiple of a pitch of the arrays of semiconductor dies of different alternative configurations, and wherein the internal electrical contact elements are disposed in orthogonal rows, and adjacent rows thereof have a spacing equal to the pitch of the subsidiary fiducial markings.
2. The method of claim 1 , wherein the shape of the subsidiary fiducial markings is distinguishable by vision algorithms from the shape of the main fiducial markings.
3. The method of claim 2 , wherein using the subsidiary fiducial markings includes coarse positioning using the main fiducial markings and fine positioning using the subsidiary fiducial markings.
4. The method of claim 1 , wherein electrically connecting the contact elements includes attaching bond wires to the internal electrical contact elements of the substrate panel and the bonding pads of the semiconductor dies using the subsidiary fiducial markings.
5. The method of claim 1 , wherein the array of semiconductor dies is encapsulated in a molding compound before singulating the substrate panel.
6. The method of claim 5 , wherein an array of solder balls is attached to the external electrical contact elements on the second face of the substrate panel before singulating the substrate panel.
7. A substrate panel for use in assembling semiconductor devices with semiconductor dies of alternative configurations, the substrate panel comprising:
an array of internal electrical contact elements on a first face for connection to the semiconductor dies;
fiducial markings on the first face for guiding apparatus performing operations of placing and mounting an array of semiconductor dies of a selected configuration on the first face of the substrate panel, electrically connecting the internal electrical contact elements of the substrate panel with bonding pads of the semiconductor dies, and singulating the substrate panel with the semiconductor dies; and
an array of external electrical contact elements on a second face, opposite the first face, for connection to external electrical circuitry, wherein the internal and external electrical contact elements are aligned and electrically connected through the substrate panel by respective vias,
wherein the fiducial markings include main fiducial markings located proximate to an outer perimeter of the substrate panel and at corners thereof, and an array of subsidiary fiducial markings corresponding to arrays of semiconductor dies of different alternative configurations of semiconductor dies, wherein the array of subsidiary fiducial markings extends in two orthogonal dimensions and the subsidiary fiducial markings have a pitch that is a sub-multiple of a pitch of the arrays of semiconductor dies of different alternative configurations, and wherein the internal electrical contact elements of the substrate panel are disposed in orthogonal rows, and adjacent rows thereof have a spacing equal to the pitch of the subsidiary fiducial markings.
8. The substrate panel of claim 7 , wherein the shape of the subsidiary fiducial markings is distinguishable by vision algorithms from the shape of the main fiducial markings.