IP Library Granted Patent US 9,209,119
Granted Patent B1
US 9,209,119 · App. 14/554,064 · Granted Dec 8, 2015

Semiconductor device assembled using two lead frames

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,209,119
App. No.
14/554,064
Granted
Dec 8, 2015
Kind
B1
Abstract

A packaged semiconductor device is assembled using a first lead frame upon which a die is mounted and encapsulated and a second lead frame that provides bent leads for the device. By using two different lead frames, an array of the first lead frames can be configured with more lead frames for more devices than a comparably sized lead frame array of the prior art because the first lead frame array does not need to provide the leads for the packaged devices. Instead, the leads are provided by the second lead frame array, which can be attached to the first lead frame array after the dies have been mounted and encapsulated on the first lead frame array.

Claims (10)

1. A packaged semiconductor device, comprising:

a first lead frame;

a die mounted on the first lead frame;

a second lead frame attached to the first lead frame, wherein the second lead frame provides gull wing leads for the packaged semiconductor device, wherein the gull wing leads are bent, and do not extend beyond a perimeter of the packaged semiconductor device.

2. The packaged semiconductor device of claim 1 , wherein:

the die is die bonded on the first lead frame and electrically connected to the first lead frame with bond wires; and

the die and the bond wires are encapsulated within a molding compound.

3. The packaged semiconductor device of claim 1 , wherein:

the die is mounted to a top surface of the first lead frame; and

the second lead frame is attached to a bottom surface of the first lead frame.

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0444 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0535 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037358/0001 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Feb 18, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035034/0019 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Feb 18, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035033/0923 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Feb 18, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035033/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 26, 2014
From: WANG, HUAN; LIU, HEJIN; SUN, WEIPING
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 034266/0567 →