IP Library Granted Patent US 9,472,643
Granted Patent B2
US 9,472,643 · App. 14/595,756 · Granted Oct 18, 2016

Method to improve reliability of replacement gate device

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Quick Facts
Patent No.
US 9,472,643
App. No.
14/595,756
Granted
Oct 18, 2016
Kind
B2
Abstract

A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over the area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; depositing a sacrificial layer over the thin metal layer; performing a first rapid thermal anneal; removing the sacrificial layer; and depositing a metal layer of low resistivity metal for gap fill.

Claims (20)

1. A method of fabricating a gate stack for a semiconductor device, said method comprising steps of:

after removal of a dummy gate, providing a replacement gate structure by performing steps of:

growing a high-k dielectric layer over an area vacated by the dummy gate;

depositing a thin metal layer over the high-k dielectric layer;

depositing a sacrificial layer over the thin metal layer;

performing a first rapid thermal anneal of the replacement gate structure at a high temperature of not less than 800° C.;

removing the sacrificial layer from the thin metal layer to expose an entirety of the thin metal layer directly over a channel region of the semiconductor device; and

depositing a metal layer of low resistivity metal directly on an entirety of the thin metal layer in the gate stack.

2. The method of claim 1 further comprising:

performing a second rapid thermal anneal after annealing the structure.

3. The method of claim 2 performing the second rapid thermal anneal comprises performing a millisecond anneal with a laser.

4. The method of claim 2 wherein performing the second rapid thermal anneal comprises performing a millisecond anneal with a flash lamp.

5. The method of claim 1 wherein performing the first rapid thermal anneal comprises annealing at a temperature between 800° C. and 1100° C.

6. The method of claim 5 wherein performing the first rapid thermal anneal further comprises spiking the temperature for a period of time up to five seconds.

7. The method of claim 6 wherein performing the first rapid thermal anneal comprises annealing the structure in ambient nitrogen.

8. The method of claim 1 wherein depositing the metal layer comprises:

depositing a work function metal; and

depositing a gap fill metal of low resistivity.

9. The method of claim 1 wherein depositing the sacrificial layer comprises depositing a layer of polycrystalline silicon.

10. The method of claim 1 wherein depositing the sacrificial layer comprises depositing a layer of amorphous silicon.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 054633/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →