THICK BOND PAD FOR CHIP WITH CAVITY PACKAGE
Disclosed herein a method, including depositing a silicon nitride layer over an inter layer dielectric (ILD); depositing a first conductive layer having a first thickness; forming a mask over a first portion of the first conductive layer to expose a second portion of the first conductive layer; etching the first conductive layer; etching the silicon nitride layer with a fluorine-based etch; and depositing a second conductive layer having a second thickness.
1 . A method, comprising:
depositing a silicon nitride layer over an inter layer dielectric (ILD);
depositing a first conductive layer having a first thickness;
forming a mask over a first portion of the first conductive layer to expose a second portion of the first conductive layer;
etching the first conductive layer;
etching the silicon nitride layer with a fluorine-based etch; and
depositing a second conductive layer having a second thickness.
2 . The method of claim 1 , wherein the first thickness is approximately 1.0 micron or greater.
3 . The method of claim 1 , wherein the second thickness is less than approximately 1.0 micron.
4 . The method of claim 1 , further comprising connecting the first conductive layer and the second conductive layer with a package lead.
5 . The method of claim 1 , further comprising connecting the second conductive layer with the first conductive layer and the at least one via in the ILD.
6 . The method of claim 1 , wherein the second conductive layer depositing includes completely covering the first conductive layer with the second conductive layer.
7 . The method of claim 1 , wherein the first conductive layer is aluminum.
8 . The method of claim 7 , wherein the etching the first conductive layer includes using a chlorine-based etching.