IP Library Granted Patent US 9,362,165
Granted Patent B1
US 9,362,165 · App. 14/707,443 · Granted Jun 7, 2016

2D self-aligned via first process flow

Inventors: Guillaume Bouche (Albany, NY); Andy Wei (Queensbury, NY); Sudharshanan Raghunathan (Mechanicsville, NY)
Assignee: GLOBALFOUNDRIES INC.
H01L21/76843H01L21/7684H01L21/76802H01L23/5226H01L23/5329
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Quick Facts
Patent No.
US 9,362,165
App. No.
14/707,443
Granted
Jun 7, 2016
Kind
B1
Abstract

A method of forming 2D self-aligned vias before forming a subsequent metal layer and reducing capacitance of the resulting device and the resulting device are provided. Embodiments include forming dummy metal lines in a SiOC layer and extending in a first direction; replacing the dummy metal lines with metal lines, each metal line having a nitride cap; forming a softmask stack over the nitride cap and the SiOC layer; patterning a plurality of vias through the softmask stack down to the metal lines, the plurality of vias self-aligned along a second direction; removing the softmask stack; forming second dummy metal lines over the metal lines and extending in the second direction; forming a second SiOC layer between the dummy second metal lines on the SiOC layer; and replacing the dummy second metal lines with second metal lines, the second metal lines electrically connected to the metal lines through a via.

Claims (103)

1. A method comprising:

forming parallel dummy first metal lines in a first silicon oxycarbide (SiOC) layer and extending in a first direction;

replacing the dummy first metal lines with first metal lines, each first metal line having a nitride cap;

forming a first softmask stack over the nitride cap and the first SiOC layer;

patterning a plurality of vias through the softmask stack down to the first metal lines, the plurality of vias self-aligned along a second direction;

removing the first softmask stack;

forming parallel dummy second metal lines over the first metal lines and extending in the second direction;

forming a second SiOC layer between the dummy second metal lines on the first SiOC layer; and

replacing the dummy second metal lines with second metal lines, the second metal lines electrically connected to the first metal lines through at least one of the vias.

2. The method according to claim 1 , comprising forming the dummy first lines by:

forming an oxide layer over a silicon substrate;

forming the first SiOC layer over the oxide layer;

forming parallel trenches in the first SiOC layer extending in the first direction;

filling the trenches partially with amorphous silicon (a-Si);

forming a nitride layer over the a-Si and the first SiOC layer; and

planarizing the nitride layer down to the first SiOC layer.

3. The method according to claim 2 , comprising replacing the dummy first metal lines with the first metal lines by:

removing the a-Si and nitride layer from the trenches down to the oxide layer;

forming a barrier layer over the trenches and first SiOC layer;

forming a first metal layer over the barrier layer;

planarizing the first metal layer;

recessing the first metal layer;

forming the nitride cap over the recessed first metal layer and the first SiOC layer; and

planarizing the nitride cap down to the first SiOC layer.

4. The method according to claim 1 , comprising forming the softmask stack by:

forming a spin-on-hardmask (SOH) layer over the nitride cap and first SiOC layer;

forming a silicon oxynitrdie (SiON) layer over the SOH layer;

forming a buried anti-reflective coating (BARC) layer over the SiON layer; and

forming a photoresist layer over the BARC layer.

5. The method according to claim 1 , comprising patterning the plurality of vias by:

forming a plurality of holes by lithography in the photoresist down to the BARC;

transferring the plurality of holes down to the nitride cap; and

etching the plurality of holes selective to the first metal lines and the first SiOC layer.

6. The method according to claim 1 , comprising forming the dummy second metal lines by:

forming a dummy a-Si layer over the nitride cap and first SiOC layer and in the plurality of vias;

forming a second softmask stack over the dummy a-Si layer; and

patterning the second softmask stack and dummy a-Si layer down to the nitride cap and first SiOC layer.

7. The method according to claim 6 , comprising forming the second softmask stack by:

forming a nitride layer over the dummy a-Si layer, the nitride layer having a thickness greater than a thickness of the nitride cap;

forming a second dummy a-Si layer over the nitride layer;

forming a SOH layer over the other a-Si layer;

forming a SiON layer over the SOH layer;

forming a BARC layer over the SiON layer; and

forming a photoresist layer over the BARC layer.

8. The method according to claim 7 , comprising patterning the second softmask stack and dummy a-Si layer by:

patterning the photoresist layer into parallel lines, the parallel lines patterned along the second direction; and

etching between the parallel lines down to the nitride cap and the first SiOC layer.

9. The method according to claim 8 , further comprising:

removing the a-Si layer from the plurality of vias and the nitride cap between the parallel lines down to the first metal lines; and

removing the second dummy a-Si layer and the SOH, SiON, BARC, and photoresist layers.

10. The method according to claim 9 , comprising removing the nitride cap between the parallel lines concurrently with removing the a-Si layer from the plural vias.

11. The method according to claim 7 , comprising replacing the dummy second metal lines with second metal lines by:

forming the second SiOC layer over and between the dummy second metal lines;

planarizing the second SiOC layer down to the nitride layer;

etching the dummy second metal lines down to the nitride cap and the first SiOC layer, forming parallel trenches;

forming a barrier layer over the second SiOC layer and the trenches and in the plurality of vias;

forming a second metal layer over the barrier layer; and

planarizing the second metal layer down the second SiOC layer.

12. A method comprising:

forming parallel first metal lines in a first silicon oxycarbide (SiOC) layer and extending in a first direction, the first metal lines having a nitride cap;

forming a spin-on-hardmask (SOH) layer over the nitride cap and first SiOC layer;

forming a silicon oxynitride (SiON) layer over the SOH layer;

forming a buried anti-reflective coating (BARC) layer over the SiON layer;

forming a photoresist layer over the BARC layer;

forming a plurality of vias by lithography in the photoresist layer down to the BARC;

transferring the plurality of vias down to the nitride cap;

etching the plurality of vias selective to the first metal lines and first SiOC layer;

removing the first softmask; and

forming second metal lines in a second SiOC layer and extending in a second direction, the second metal lines electrically connected to the first metal lines through at least one of the plurality of vias.

13. The method according to claim 12 , comprising forming the first metal lines by:

forming an oxide layer over a silicon substrate;

forming the first SiOC layer over the oxide layer;

forming parallel trenches in the first SiOC layer in the first direction;

filling the trenches partially with amorphous silicon (a-Si);

forming a nitride layer over the a-Si and the first SiOC layer;

planarizing the nitride layer down to the first SiOC layer;

removing the a-Si and nitride layer from the trenches down to the oxide layer;

forming a barrier layer over the trenches and first SiOC layer;

forming a first metal layer over the barrier layer;

planarizing the first metal layer;

recessing the first metal layer;

forming the nitride cap over the recessed first metal layer and the first SiOC layer; and

planarizing the nitride cap down to the first SiOC layer.

14. The method according to claim 12 , comprising forming dummy metal lines prior to forming the second metal lines by:

forming a first a-Si layer over the nitride cap and first SiOC layer and in the plurality of vias;

forming a nitride layer over the first a-Si layer, the nitride layer having a thickness greater than a thickness of the nitride cap;

forming a second a-Si layer over the nitride layer;

forming a SOH layer over the second a-Si layer;

forming a SiON layer over the SOH layer;

forming a BARC layer over the SiON layer;

forming a photoresist layer over the BARC layer;

patterning the photoresist layer into parallel lines, the parallel lines patterned along the second direction;

etching between the parallel lines down to the nitride cap and the first SiOC layer;

removing the a-Si layer from the plurality of vias from opposite sides of each parallel line;

removing the second a-Si layer and the SOH, SiON, BARC, and photoresist layers; and

removing the nitride cap from opposite sides of each dummy metal line.

15. The method according to claim 14 , comprising forming the second metal lines by:

forming the second SiOC layer over the dummy lines;

planarizing the second SiOC layer down to the nitride layer;

etching the dummy lines down to the nitride cap and the first SiOC layer, forming parallel trenches;

forming a barrier layer over the second SiOC layer and the trenches and in the plurality of vias;

forming a second metal layer over the barrier layer; and

planarizing the second metal layer down the second SiOC layer.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2019
From: GLOBALFOUNDRIES INC.
To: ALSEPHINA INNOVATIONS INC.
Reel/Frame 049669/0749 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: BOUCHE, GUILLAUME; WEI, ANDY; RAGHUNATHAN, SUDHARSHANAN
To: GLOBALFOUNDRIES INC.
Reel/Frame 035597/0397 →