IP Library Granted Patent US 9,608,056
Granted Patent B2
US 9,608,056 · App. 14/750,682 · Granted Mar 28, 2017

Schottky-barrier device and related semiconductor product

Inventor: Andrei Konstantinov (Sollentuna, SE)
Assignee: Fairchild Semiconductor Corporation
H01L29/0619H01L21/02529H01L21/302H01L21/3065H01L29/0692H01L29/1095H01L29/1608H01L29/872
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Quick Facts
Patent No.
US 9,608,056
App. No.
14/750,682
Granted
Mar 28, 2017
Kind
B2
Abstract

In one general aspect, a power rectifier device can include a drift layer including silicon carbide of n-type conductivity, and a Schottky electrode disposed on the drift layer where the Schottky electrode and a surface of the drift layer can provide a Schottky contact. The power rectifier device can also include an array of p-type regions disposed underneath the Schottky electrode.

Claims (29)

1. A power rectifier device, comprising:

a drift layer including silicon carbide of n-type conductivity;

a Schottky electrode disposed on the drift layer, the Schottky electrode and a surface of the drift layer providing a Schottky contact;

an array of p-type depletion stoppers disposed underneath the Schottky electrode;

an array of surge pn diodes distributed within a region defined by a junction termination region located at an outer periphery of the power rectifier device;

an additional p-doped region; and

an Ohmic contact disposed on the additional p-doped region, the Schottky electrode having an outer periphery located within a region of the Ohmic contact.

2. The power rectifier device of claim 1 , wherein a maximum lateral spacing between two consecutively arranged p-type depletion stoppers of the array is less than approximately six times a penetration depth of p-dopant of the p-type depletion stoppers in the drift layer.

3. The power rectifier device of claim 1 , wherein a lateral width of a p-type depletion stoppers of the array is less than a lateral spacing between two consecutively arranged p-type depletion stoppers of the array.

4. The power rectifier device of claim 1 , wherein a lateral spacing between two consecutively arranged p-type depletion stoppers of the array is approximately 1 to 5 micrometers.

5. The power rectifier device of claim 1 , wherein a near-surface portion of the drift layer includes a doping being 1.5 to 8 times higher than a doping of a remaining part of the drift layer.

6. The power rectifier device of claim 5 , wherein a depth of the near-surface portion of the drift layer is approximately equal to an implantation depth of p-dopant of at least one of the p-type depletion stoppers of the array.

7. The power rectifier device of claim 1 , wherein the additional p-doped region is located at an edge of the power rectifier device.

8. The power rectifier device of claim 1 , wherein the additional p-doped region forms a continuous belt enclosing the power rectifier device.

9. The power rectifier device of claim 1 further comprising a junction termination region at an outer periphery of the power rectifier device, wherein the additional p-doped region is located within an area delimited by the junction termination region.

10. The power rectifier device of claim 1 , wherein the Ohmic contact is a p-type Ohmic contact disposed on the additional p-doped region connecting the Schottky electrode and an inner periphery of a junction termination region arranged at an outer periphery of the power rectifier device.

11. The power rectifier device of claim 1 , further comprising a junction termination region at an outer periphery of the power rectifier device.

12. The power rectifier device of claim 1 , wherein the drift layer has a planarized surface such that a depth of each of a plurality of pits of the surface of the drift layer is less than approximately D max =E b /F a , where E b is a metal-semiconductor barrier height and F a is an avalanche breakdown field.

13. The power rectifier device of claim 1 , wherein any pit of the surface of the drift layer having a diameter or lateral extension of less than approximately 2 micrometers has a depth which is less than approximately 5 nanometers.

14. The power rectifier device of claim 1 , wherein the surge diodes extend vertically within a near-surface portion of the drift layer including a doping of 1.5 to 8 times higher than a doping of a remaining part of the drift layer.

15. The power rectifier device of claim 1 , wherein at least one of the surge pn diodes from the array of surge pn diodes has a minimum lateral extension of two times a thickness of the drift layer.

16. A power rectifier device, comprising:

a drift layer including silicon carbide;

a Schottky electrode disposed on the drift layer, the Schottky electrode and a surface of the drift layer providing a Schottky contact;

an array of p-type depletion stoppers underneath the Schottky electrode;

a junction termination region arranged at an outer periphery of the power rectifier device; and

an array of surge pn diodes distributed within an area defined by the junction termination region, at least one of the surge pn diodes from the array of surge pn diodes having a minimum lateral extension of two times a thickness of the drift layer.

17. The power rectifier device of claim 16 , wherein the surge diodes extend vertically within a near-surface portion of the drift layer including a doping of 1.5 to 8 times higher than a doping of a remaining part of the drift layer.

18. The power rectifier device of claim 16 , further comprising an additional p-doped region located at an edge of the power rectifier device within an area delimited by the junction termination region.

Assignments (9)
SECURITY INTEREST Recorded Jul 13, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; GTAT CORPORATION
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064271/0971 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 065653/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 040075, FRAME 0644 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0536 →
SECURITY INTEREST Recorded Nov 12, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058871/0799 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2021
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 057969/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057694/0374 →
PATENT SECURITY AGREEMENT Recorded Sep 19, 2016
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 040075/0644 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2015
From: KONSTANTINOV, ANDREI
To: TRANSIC AB
Reel/Frame 035908/0453 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2015
From: TRANSIC AB
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 035908/0511 →
Continuity (3)
Continuation 13920933 · Jun 18, 2013
Provisional Application 61665090 · Jun 27, 2012
Related Publication 20150295023A1 · Oct 15, 2015