Deep trench isolation structures and systems and methods including the same
Deep trench isolation structures and systems and methods including the same are disclosed herein. The systems include a semiconductor device. The semiconductor device includes a semiconductor body, a device region, and the deep trench isolation structure. The deep trench isolation structure is configured to electrically isolate the device region from other device regions that extend within the semiconductor body. The deep trench isolation structure includes an isolation trench, a dielectric material that extends within the isolation trench, a first semiconducting region, and a second semiconducting region. The methods include methods of operating an integrated circuit device that includes a plurality of semiconductor devices that include the disclosed deep trench isolation structures.
1. A semiconductor device, comprising:
a semiconductor body of a first conductivity type, the semiconductor body having a body dopant concentration and a body surface;
a device region extending into the semiconductor body from the body surface; and
a deep trench isolation structure configured to electrically isolate the device region from other device regions that extend within the semiconductor body, the deep trench isolation structure comprising
(i) an isolation trench extending into the semiconductor body from the body surface and extending around the device region,
(ii) a dielectric material extending within the isolation trench,
(iii) a first semiconducting region of the first conductivity type having a first dopant concentration, wherein the device region separates the first semiconducting region from the body surface, and
(iv) a second semiconducting region of the first conductivity type having a second dopant concentration and separating the device region from the first semiconducting region,
wherein the first dopant concentration is greater than the body dopant concentration, and further wherein the first dopant concentration is greater than the second dopant concentration.
2. The semiconductor device of claim 1 , wherein the deep trench isolation structure further comprises:
(i) a third semiconducting region of a second conductivity type that is opposite the first conductivity type, the third semiconducting region having a third dopant concentration and separating the second semiconducting region from the device region;
(ii) a fourth semiconducting region of the second conductivity type having a fourth dopant concentration and separating the third semiconducting region from the device region; and
(iii) a fifth semiconducting region of the second conductivity type having a fifth dopant concentration and extending between the body surface and the fourth semiconducting region;
wherein the fourth dopant concentration is greater than the third dopant concentration.
3. The semiconductor device of claim 2 , wherein a ratio of the fourth dopant concentration to the third dopant concentration is 50-10,000.
4. The semiconductor device of claim 1 , wherein the isolation trench extends through the second semiconducting region.
5. The semiconductor device of claim 1 , wherein the isolation trench extends through the first semiconducting region.
6. The semiconductor device of claim 1 , wherein a ratio of the first dopant concentration to the second dopant concentration is 2-20.
7. The semiconductor device of claim 1 , wherein the deep trench isolation structure further comprises:
an electrically conductive body extending within the isolation trench, wherein the dielectric material extends between the electrically conductive body and the semiconductor body and electrically isolates the electrically conductive body from the semiconductor body; and
an electrical connection to the electrically conductive body, wherein the electrical connection is configured to at least one of
(i) permit grounding of the electrically conductive body, and
(ii) permit an electrical potential to be conveyed to the electrically conductive body.
8. The semiconductor device of claim 1 , wherein:
the device region is a first device region;
the deep trench isolation structure is a first deep trench isolation structure;
the semiconductor device further comprises a second device region; and
the semiconductor device further comprises a second deep trench isolation structure that is configured to electrically isolate the second device region from the first device region;
wherein the isolation trench extends in contact with the first device region and the second device region and forms a portion of both the first deep trench isolation structure and the second deep trench isolation structure.