IP Library Granted Patent US 9,509,251
Granted Patent B2
US 9,509,251 · App. 14/832,525 · Granted Nov 29, 2016

RF amplifier module and methods of manufacture thereof

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Quick Facts
Patent No.
US 9,509,251
App. No.
14/832,525
Granted
Nov 29, 2016
Kind
B2
Abstract

An amplifier module includes a module substrate. Conductive interconnect structures and an amplifier device are coupled to a top surface of the module substrate. The interconnect structures partially cover the module substrate top surface to define conductor-less areas at the top surface. The amplifier device includes a semiconductor substrate, a transistor, a conductive feature coupled to a bottom surface of the semiconductor substrate and to at least one of the interconnect structures, and a filter circuit electrically coupled to the transistor. The conductive feature only partially covers the semiconductor substrate bottom surface to define a conductor-less region that spans a portion of the bottom surface. The conductor-less region is aligned with at least one of the conductor-less areas at the module substrate top surface. The filter circuit includes a passive component formed over a portion of the semiconductor substrate top surface that is directly opposite the conductor-less region.

Claims (61)

1. An amplifier module comprising:

a module substrate having a top module substrate surface and a bottom module substrate surface;

a plurality of first conductive interconnect structures coupled to the top module substrate surface, wherein the plurality of first conductive interconnect structures only partially cover the top module substrate surface to define a plurality of conductor-less areas at the top module substrate surface; and

an amplifier device coupled to the module substrate top surface, wherein the amplifier device includes:

a semiconductor substrate having a top semiconductor substrate surface and a bottom semiconductor substrate surface,

a transistor,

a first conductive feature coupled to the bottom semiconductor substrate surface and to at least one of the first conductive interconnect structures, wherein the first conductive feature only partially covers the bottom semiconductor substrate surface to define a first conductor-less region that spans a first portion of the bottom semiconductor substrate surface, and wherein the first conductor-less region is aligned with at least one of the plurality of conductor-less areas at the top module substrate surface, and

a first filter circuit electrically coupled to the transistor, wherein the first filter circuit includes a first passive component formed over a portion of the top semiconductor substrate surface that is directly opposite the first conductor-less region.

2. The amplifier module of claim 1 , further comprising one or more additional amplifier system components coupled to the module substrate top surface and electrically coupled to the amplifier device, wherein the one or more additional amplifier system components are selected from a power splitter, a power combiner, a phase shifter, an attenuator, a module for digitally controlling phase shift, a module for digitally controlling attenuation, a controller, a bias circuit, a memory device, a power meter, and a temperature sensor.

3. The amplifier module of claim 1 , further comprising:

a plurality of second conductive interconnect structures coupled to the bottom module substrate surface; and

a plurality of third conductive interconnect structures coupled between the first conductive interconnect structures and the second conductive interconnect structures, wherein each of the third conductive interconnect structures is selected from a through substrate via (TSV) and a wrap-around termination.

4. The amplifier module of claim 1 , further comprising:

encapsulant applied over the top semiconductor substrate surface and over the top module substrate surface.

5. The amplifier module of claim 1 , further comprising:

a bulk conductive structure in the module substrate, extending between the top module substrate surface and the bottom module substrate surface, and coupled to the first conductive feature.

6. The amplifier module of claim 1 , wherein the first passive component is a spiral inductor comprising portions of one or more conductive layers formed over the top semiconductor substrate surface.

7. The amplifier module of claim 1 , wherein the first filter circuit is selected from a low pass filter circuit, a high pass filter circuit, and a band pass filter circuit.

8. The amplifier module of claim 1 , wherein:

the transistor includes a first control terminal, a first current conducting terminal, and a second current conducting terminal;

the first current conducting terminal is electrically coupled to the first conductive feature;

the first filter circuit is electrically coupled to the second current conducting terminal; and the amplifier module further comprises:

a second conductive feature coupled to the bottom semiconductor substrate surface, wherein the second conductive feature is physically separated from the first conductive feature across the first conductor-less region, and wherein the second current conducting terminal is electrically coupled to the second conductive feature and to at least one of the first conductive interconnect structures.

9. The amplifier module of claim 8 , wherein the semiconductor substrate is a high resistivity substrate, and the second current conducting terminal is electrically coupled to the second conductive feature with at least one conductive structure selected from a through substrate via (TSV) and a wrap-around termination.

10. The amplifier module of claim 8 , wherein:

the first passive component is a first inductor with first and second inductor terminals,

the first inductor terminal is electrically coupled to the second current conducting terminal and to the second conductive feature,

the first filter circuit further includes a capacitor with first and second capacitor plates,

the first capacitor plate is electrically coupled to the second inductor terminal at a radio frequency (RF) cold point node, and

the second capacitor plate is electrically coupled to the first conductive feature.

11. The amplifier module of claim 8 , further comprising:

a third conductive feature that is physically separated from the first conductive feature across a second conductor-less region spanning a second portion of the bottom semiconductor substrate surface; and

a second filter circuit electrically coupled to the first control terminal and to the third conductive feature.

12. The amplifier module of claim 11 , wherein the second filter circuit includes a second passive component formed over a portion of the top semiconductor substrate surface is directly opposite the second conductor-less region.

13. The amplifier module of claim 11 , wherein:

the module substrate comprises a printed circuit board; and

the plurality of conductive interconnect structures includes a first conductive trace coupled to the top module substrate surface and to the second conductive feature, and a second conductive trace coupled to the top module substrate surface and to the third conductive feature.

14. The amplifier module of claim 11 , wherein the second filter circuit is selected from a low pass filter circuit, a high pass filter circuit, and a band pass filter circuit.

15. The amplifier module of claim 8 , wherein:

the first current conducting terminal is electrically coupled to the first conductive feature through at least one first TSV that extends between the top and bottom semiconductor substrate surfaces, and

the second current conducting terminal is electrically coupled to the second conductive feature through at least one second TSV that extends between the top and bottom semiconductor substrate surfaces.

16. The amplifier module of claim 8 , wherein:

the first and second conductive features form portions of a patterned conductive layer coupled to the bottom semiconductor substrate surface, and

the patterned conductive layer has a thickness in a range of 10 microns to 50 microns.

17. A method of forming an amplifier module, the method comprising the steps of:

coupling a plurality of first conductive interconnect structures to a top module substrate surface of a module substrate, wherein the plurality of first conductive interconnect structures only partially cover the top module substrate surface to define a plurality of conductor-less areas at the top module substrate surface; and

coupling an amplifier device to the module substrate top surface, wherein the amplifier device includes:

a semiconductor substrate having a top semiconductor substrate surface and a bottom semiconductor substrate surface,

a first conductive feature coupled to the bottom semiconductor substrate surface and to at least one of the first conductive interconnect structures, wherein the first conductive feature only partially covers the bottom semiconductor substrate surface to define a first conductor-less region that spans a first portion of the bottom semiconductor substrate surface, and wherein the first conductor-less region is aligned with at least one of the plurality of conductor-less areas at the top module substrate surface,

a transistor formed at the top semiconductor substrate surface, and

a first filter circuit electrically coupled to the second current conducting terminal, wherein the first filter circuit includes a first passive component formed over a portion of the top semiconductor substrate surface that is directly opposite the first conductor-less region.

18. The method of claim 17 , further comprising:

coupling one or more additional amplifier system components to the module substrate top surface, wherein the one or more additional amplifier system components are electrically coupled to the amplifier device, and wherein the one or more additional amplifier system components are selected from a power splitter, a power combiner, a phase shifter, an attenuator, a module for digitally controlling phase shift, a module for digitally controlling attenuation, a controller, a bias circuit, a memory device, a power meter, and a temperature sensor.

19. The method of claim 17 , further comprising:

applying encapsulant over the top semiconductor substrate surface and over the top module substrate surface.

20. The method of claim 19 , wherein:

the module substrate comprises a first portion of a multiple-module printed circuit board that includes a plurality of additional module substrates; and

the method further comprises:

coupling a plurality of additional amplifier devices to the plurality of additional module substrates;

applying encapsulant over the top module substrate surfaces of the module substrate and the additional module substrates; and

performing a singulation process to form the amplifier module and a plurality of additional amplifier modules.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNMENT DOCUMENTATION - INITIAL CONVENYANCE LISTED CHANGE OF NAME. PREVIOUSLY RECORDED ON REEL 040579 FRAME 0827. ASSIGNOR(S) HEREBY CONFIRMS THE UPDATE CONVEYANCE TO MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Dec 15, 2016
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 040945/0252 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
CHANGE OF NAME Recorded Nov 9, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040579/0827 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2015
From: JONES, JEFFREY K.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 036393/0471 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2015
From: JONES, JEFFREY K.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 036393/0343 →