IP Library Granted Patent US 9,484,300
Granted Patent B2
US 9,484,300 · App. 14/953,864 · Granted Nov 1, 2016

Device resulting from printing minimum width semiconductor features at non-minimum pitch

Inventors: Sonia Ghosh (Fishkill, NY); Randy Mann (Milton, NY); Norman Chen (Poughkeepsie, NY); Shaowen Gao (Clifton Park, NY)
Assignee: GLOBALFOUNDRIES INC.
H01L23/528G06F17/5068H01L21/32139H01L22/12H01L23/5226H01L27/1116H01L27/0207H01L2924/0002Y02T10/82
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Quick Facts
Patent No.
US 9,484,300
App. No.
14/953,864
Granted
Nov 1, 2016
Kind
B2
Abstract

Methods for forming a semiconductor layer, such as a metal1 layer, having minimum width features separated by a distance greater than a minimum pitch, and the resulting devices are disclosed. Embodiments may include determining a first shape and a second shape having a minimum width within a semiconductor layer, wherein a distance between the first shape and the second shape is greater than a minimum pitch, determining an intervening shape between the first shape and the second shape, and designating a dummy shape within the intervening shape, wherein the dummy shape is at the minimum pitch from the first shape.

Claims (11)

1. An apparatus comprising:

a semiconductor layer comprising a dummy shape, a first shape and a second shape,

wherein the first shape has a minimum width within the semiconductor layer that is greater than a minimum pitch from the second shape having the minimum width,

the dummy shape is provided in an intervening shape between the first shape and the second shape, and

the dummy shape is at the minimum pitch from the first shape and the second shape and is at least the minimum width.

2. The apparatus according to claim 1 , wherein the dummy shape comprises a first portion and a second portion, the first portion being at the minimum pitch from the first shape and the second portion being at the minimum pitch from the second shape.

3. The apparatus according to claim 1 , wherein the semiconductor layer is a metal1 (M1) layer.

4. The apparatus according to claim 1 , wherein the semiconductor layer is formed by patterning a first hardmask according to the first shape, the second shape and the dummy shape during a first lithography-etch step.

5. The apparatus according to claim 4 , wherein the semiconductor layer is formed by patterning a second hardmask according to the intervening shape during a second lithography-etch step.

6. The apparatus according to claim 1 , the minimum width is 32 nm.

7. The apparatus according to claim 1 , the minimum pitch is 128 nm.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2019
From: GLOBALFOUNDRIES INC.
To: ALSEPHINA INNOVATIONS INC.
Reel/Frame 049669/0749 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 1, 2015
From: GHOSH, SONIA; MANN, RANDY; CHEN, NORMAN; GAO, SHAOWEN
To: GLOBALFOUNDRIES INC.
Reel/Frame 037176/0466 →
Continuity (2)
Division 14074981 · Nov 8, 2013
Related Publication 20160093565A1 · Mar 31, 2016