IP Library Granted Patent US 10,083,903
Granted Patent B1
US 10,083,903 · App. 15/201,575 · Granted Sep 25, 2018

Integrated circuit packaging system with molded laser via interposer and method of manufacture thereof

Inventors: In Sang Yoon (Seoul, KR); DeokKyung Yang (Hanam-si, KR); Sungmin Song (Inchon, KR)
Assignee: STATS ChipPAC Pte. Ltd.
H01L23/49838H01L21/4853H01L21/565H01L23/3114H01L23/49816
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Quick Facts
Patent No.
US 10,083,903
App. No.
15/201,575
Granted
Sep 25, 2018
Kind
B1
Abstract

A method of manufacture of an integrated packaging system includes: providing a substrate; mounting an integrated circuit on the substrate; mounting an interposer substrate having an interposer pad on the integrated circuit; covering an encapsulant over the integrated circuit and the interposer substrate; forming a hole through the encapsulant aligned over the interposer pad; and placing a conductive connector on and in direct contact with the interposer pad.

Claims (34)

1. A method of manufacture of an integrated circuit packaging system comprising:

mounting an integrated circuit on a substrate;

mounting an interposer substrate on the integrated circuit, the interposer substrate having an interposer pad electrically connected to the integrated circuit with an interposer interconnect;

forming an encapsulant around the integrated circuit and the interposer substrate with a hole in the encapsulant aligned over the interposer pad; and

forming a conductive connector on and in direct contact with the interposer pad, the conductive connector completely encircled by the hole at a top planar surface of the encapsulant, and the conductive connector having a regular spacing between the conductive connector and a further conductive connector immediately adjacent to the conductive connector less than a regular external spacing between an external interconnect and a further external interconnect immediately adjacent to the external interconnect on the substrate.

2. The method as claimed in claim 1 wherein the interposer substrate is electrically connected to the substrate with the interposer interconnect.

3. The method as claimed in claim 1 wherein the forming the conductive connector includes forming the conductive connector within the hole and embedded in the encapsulant.

4. The method as claimed in claim 1 wherein forming the encapsulant includes forming the encapsulant with the hole wider at the bottom and top of the hole than the middle of the hole.

5. The method as claimed in claim 1 wherein forming the encapsulant includes forming the encapsulant with the hole having characteristics of having been burned through including burn marks, melt marks, carbon residue, or a combination thereof on surfaces immediately adjacent to the hole.

6. A method of manufacture of an integrated circuit packaging system comprising:

mounting an integrated circuit on a substrate having contact pads electrically coupled to external interconnects;

mounting an interposer substrate on the integrated circuit, the interposer substrate having an interposer pad electrically connected to the integrated circuit with an interposer interconnect;

forming an encapsulant around the integrated circuit and the interposer substrate with a hole in the encapsulant aligned over the interposer pad; and

forming conductive connector on and in direct contact with each of the interposer pad, the conductive connector completely encircled by the hole at a top planar surface of the encapsulant, and the conductive connector having a regular spacing between the conductive connector and a further conductive connector immediately adjacent to the conductive connector less than a regular external spacing between an external interconnect and a further external interconnect immediately adjacent to the external interconnect.

7. The method as claimed in claim 1 wherein forming the encapsulant includes forming encapsulant with the hole and another of the hole having different sizes at different locations.

8. The method as claimed in claim 6 further comprising mounting a spacer on the integrated circuit for supporting the interposer substrate.

9. The method as claimed in claim 6 further comprising forming a device interconnect electrically connecting the integrated circuit to the substrate through a central cavity in the substrate.

10. The method as claimed in claim 6 wherein mounting the interposer include mounting the interposer substrate on a passive side of the integrated circuit.

11. An integrated circuit packaging system comprising:

an integrated circuit on a substrate;

an interposer substrate on the integrated circuit, the interposer substrate having an interposer pad electrically connected to the integrated circuit with an interposer interconnect;

an encapsulant around the integrated circuit and the interposer substrate with a hole in the encapsulant aligned over the interposer pad; and

a conductive connector on and in direct contact with the interposer pad, the conductive connector completely encircled by the hole at a top planar surface of the encapsulant, and the conductive connector having a regular spacing between the conductive connector and a further conductive connector immediately adjacent to the conductive connector less than a regular external spacing between an external interconnect and a further external interconnect immediately adjacent to the external interconnect.

12. The integrated circuit packaging system as claimed in claim 11 wherein the interposer substrate is electrically connected to the substrate with the interposer interconnect.

13. The integrated circuit packaging system as claimed in claim 11 wherein the conductive connector is within the hole and embedded in the encapsulant.

14. The integrated circuit packaging system as claimed in claim 11 wherein the encapsulant with the hole is wider at the bottom and top of the hole than the middle of the hole.

15. The integrated circuit packaging system as claimed in claim 11 wherein the encapsulant with the hole has characteristics of having been burned through including burn marks, melt marks, carbon residue, or a combination thereof on surfaces immediately adjacent to the hole.

16. The integrated circuit packaging system as claimed in claim 11 wherein:

the substrate has contact pads; and

the external interconnects are electrically connected to the contact pads.

17. The integrated circuit packaging system as claimed in claim 16 wherein the hole and another of the hole have different sizes at different locations.

18. The integrated circuit packaging system as claimed in claim 16 further comprising a spacer on the integrated circuit for supporting the interposer substrate.

19. The integrated circuit packaging system as claimed in claim 16 further comprising a device interconnect electrically connecting the integrated circuit to the substrate through a central cavity in the substrate.

20. The integrated circuit packaging system as claimed in claim 16 wherein the interposer substrate is on a passive side of the integrated circuit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2017
From: YOON, IN SANG; YANG, DEOKKYUNG; SONG, SUNGMIN
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 040975/0460 →
Continuity (2)
Continuation 14282598 · May 20, 2014
Division 13162566 · Jun 16, 2011