Semiconductor device and method of using substrate having base and conductive posts to form vertical interconnect structure in embedded die package
A semiconductor device has a substrate including a base and a plurality of conductive posts extending from the base. The substrate can be a wafer-shape, panel, or singulated form. The conductive posts can have a circular, rectangular, tapered, or narrowing intermediate shape. A semiconductor die is disposed through an opening in the base between the conductive posts. The semiconductor die extends above the conductive posts or is disposed below the conductive posts. An encapsulant is deposited over the semiconductor die and around the conductive posts. The base and a portion of the encapsulant is removed to electrically isolate the conductive posts. An interconnect structure is formed over the semiconductor die, encapsulant, and conductive posts. An insulating layer is formed over the semiconductor die, encapsulant, and conductive posts. A semiconductor package is disposed over the semiconductor die and electrically connected to the conductive posts.
1. A semiconductor device, comprising:
a carrier;
a substrate including a base and a plurality of conductive posts extending from the base, wherein the substrate is disposed over the carrier with the conductive posts oriented toward the carrier and each of the conductive posts is physically connected to each other by the base;
a semiconductor die disposed over the carrier between the conductive posts, wherein the semiconductor die is aligned with an opening formed through the base of the substrate such that the base of the substrate extends continuously completely around the semiconductor die in plan view; and
an encapsulant deposited over the carrier, substrate, and semiconductor die.
2. The semiconductor device of claim 1 , wherein a height of the semiconductor die is greater than a height of the substrate, wherein the semiconductor die extends through the opening of the substrate.
3. The semiconductor device of claim 1 , wherein the base of the substrate includes a notch opposite the conductive posts.
4. The semiconductor device of claim 1 , wherein the substrate includes a rectangular shape.
5. The semiconductor device of claim 1 , wherein the substrate includes a circular shape.
6. The semiconductor device of claim 1 , wherein the conductive posts include a tapered portion.
7. A semiconductor device, comprising:
a substrate including a base, an opening formed through the base, and a plurality of conductive posts extending from the base, wherein the base physically couples the conductive posts together;
a semiconductor die disposed between the conductive posts over the opening, wherein an active surface of the semiconductor die is aligned with ends of the conductive posts; and
an encapsulant deposited over the substrate and semiconductor die, wherein a surface of the encapsulant is coplanar with the active surface of the semiconductor die and the ends of the conductive posts.
8. The semiconductor device of claim 7 , further including an interconnect structure formed over the surface of the encapsulant and electrically connected to the conductive posts and the semiconductor die.
9. The semiconductor device of claim 8 , further including a conductive bump formed over the interconnect structure.
10. The semiconductor device of claim 7 , wherein the semiconductor die extends through the opening.
11. The semiconductor device of claim 7 , further including a carrier contacting the encapsulant, the active surface of the semiconductor die, and the ends of the conductive posts.
12. The semiconductor device of claim 7 , wherein each of the conductive posts includes a tapered portion.
13. A semiconductor device, comprising:
a substrate including a base, a plurality of conductive posts extending from the base, and an opening formed through the base between the conductive posts; and
a semiconductor die disposed over the substrate and aligned with the opening, wherein the opening extends completely around the semiconductor die in plan view.
14. The semiconductor device of claim 13 , further including a conductive layer disposed over the substrate between the semiconductor die and conductive posts.
15. The semiconductor device of claim 13 , wherein the semiconductor die extends through the opening.
16. The semiconductor device of claim 13 , wherein the conductive posts include a tapered portion.
17. The semiconductor device of claim 13 , further including an encapsulant deposited over the substrate and semiconductor die.
18. The semiconductor device of claim 17 , wherein a surface of the encapsulant is coplanar with an active surface of the semiconductor die and ends of the conductive posts.
19. A leadframe for a semiconductor device, comprising:
a base;
an opening formed through the base; and
a plurality of conductive posts extending from the base around the opening including a first row of conductive posts on a first side of the opening and a second row of conductive posts on a second side of the opening opposite the first side, wherein the base extends partially between the first row and second row toward the opening and the opening extends for a majority of a distance between the first row and second row.
20. The leadframe of claim 19 , further including a semiconductor die disposed within the opening of the base and between the conductive posts.
21. The leadframe of claim 20 , further including an encapsulant deposited over the leadframe and semiconductor die.
22. The leadframe of claim 20 , further including a conductive layer disposed between the semiconductor die and conductive posts.
23. The leadframe of claim 19 , wherein the conductive posts include a tapered portion.
24. The leadframe of claim 19 , wherein the base and conductive posts are formed from a continuous portion of conductive material.