IP Library Granted Patent US 10,204,866
Granted Patent B2
US 10,204,866 · App. 15/381,281 · Granted Feb 12, 2019

Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation

Inventors: Yaojian Lin (Singapore, SG); Kang Chen (Singapore, SG); Jianmin Fang (Singapore, SG); Xia Feng (Singapore, SG)
Assignee: STATS ChipPAC Pte. Ltd.
H01L23/5389H01L21/31051H01L21/56H01L21/768H01L21/76802H01L21/78H01L23/3107H01L23/49816H01L24/19H01L21/568H01L2224/04105H01L2224/12105H01L2224/20H01L2224/94H01L2924/014H01L2924/01004H01L2924/01006H01L2924/01013H01L2924/01019H01L2924/01029H01L2924/01047H01L2924/01049H01L2924/01073H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/01322H01L2924/12041H01L2924/12042H01L2924/1306H01L2924/13091H01L2924/14H01L2924/15311H01L2924/181H01L2924/18162
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Quick Facts
Patent No.
US 10,204,866
App. No.
15/381,281
Granted
Feb 12, 2019
Kind
B2
Abstract

A semiconductor wafer contains a plurality of semiconductor die separated by a saw street. An insulating layer is formed over the semiconductor wafer. A protective layer is formed over the insulating layer including an edge of the semiconductor die along the saw street. The protective layer covers an entire surface of the semiconductor wafer. Alternatively, an opening is formed in the protective layer over the saw street. The insulating layer has a non-planar surface and the protective layer has a planar surface. The semiconductor wafer is singulated through the protective layer and saw street to separate the semiconductor die while protecting the edge of the semiconductor die. Leading with the protective layer, the semiconductor die is mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier and protective layer are removed. A build-up interconnect structure is formed over the semiconductor die and encapsulant.

Claims (49)

1. A method of making a semiconductor device, comprising:

providing a semiconductor die;

forming a protective layer over the semiconductor die;

depositing an encapsulant over the semiconductor die;

forming a first cavity in the encapsulant;

removing the protective layer after depositing the encapsulant; and

forming an interconnect structure over the semiconductor die after removing the protective layer, wherein a first insulating layer of the interconnect structure completely fills the first cavity.

2. The method of claim 1 , further including forming the first cavity by laser drilling.

3. The method of claim 1 , further including:

forming a second insulating layer over the semiconductor die including a non-planar surface of the second insulating layer opposite the semiconductor die; and

forming the protective layer over the second insulating layer.

4. The method of claim 1 , wherein the first cavity extends to the semiconductor die.

5. The method of claim 1 , further including forming a second cavity in the first insulating layer aligned with the first cavity.

6. The method of claim 5 , wherein the interconnect structure further includes a conductive layer deposited into and completely filling the second cavity.

7. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die;

forming a first cavity in the encapsulant adjacent to the semiconductor die after depositing the encapsulant over the semiconductor die, wherein the first cavity extends only partially through the encapsulant; and

forming an insulating layer over the semiconductor die and extending into the first cavity.

8. The method of claim 7 , further including forming a second cavity in the insulating layer and aligned with the first cavity, wherein the second cavity extends only partially through the insulating layer.

9. The method of claim 8 , further including depositing a conductive layer into the second cavity, wherein the conductive layer completely fills the second cavity.

10. The method of claim 7 , further including forming a second cavity in the encapsulant and extending to the semiconductor die, wherein the second cavity is between the first cavity and semiconductor die.

11. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die, wherein the encapsulant physically contacts a side surface of the semiconductor die, and an active surface of the semiconductor die is exposed from a first surface of the encapsulant; and

removing a portion of the encapsulant to form a first cavity in the first surface of the encapsulant adjacent to the semiconductor die, wherein a portion of the encapsulant remains extending under the first cavity.

12. The method of claim 11 , further including forming the first cavity by laser drilling.

13. The method of claim 11 , further including depositing an insulating layer over the semiconductor die and into the first cavity, wherein the insulating layer physically contacts the encapsulant within the first cavity.

14. The method of claim 13 , further including forming a second cavity in the insulating layer over the first cavity.

15. The method of claim 14 , further including depositing a conductive layer into the second cavity.

16. The method of claim 11 , further including forming a second cavity in the encapsulant and extending to the semiconductor die.

17. The method of claim 16 , wherein the second cavity extends around an edge of the semiconductor die.

18. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die including a first cavity in the encapsulant outside a footprint of the semiconductor die; and

forming an interconnect structure over the semiconductor die and encapsulant, wherein an insulating material of the interconnect structure completely fills the first cavity and a bump of the interconnect structure is aligned with the first cavity.

19. The method of claim 18 , further including forming the first cavity in a surface of the encapsulant, wherein an active surface of the semiconductor die is exposed from the surface of the encapsulant.

20. The method of claim 18 , further including forming a second cavity in the encapsulant and extending to the semiconductor die.

21. The method of claim 20 , wherein the second cavity extends around an edge of the semiconductor die.

22. The method of claim 9 , further including disposing a conductive bump on the conductive layer and aligned with the first cavity and second cavity.

23. The method of claim 7 , further including:

disposing the semiconductor die on a carrier;

depositing the encapsulant over the semiconductor die and carrier; and

removing the carrier after depositing the encapsulant.

24. The method of claim 11 , further including:

disposing the semiconductor die over a carrier with the active surface of the semiconductor die oriented toward the carrier;

depositing the encapsulant over the semiconductor die and carrier;

removing the carrier after depositing the encapsulant; and

forming the first cavity after removing the carrier.

Continuity (5)
Continuation 14494508 · Sep 23, 2014
Continuation 13446664 · Apr 13, 2012
Division 13029936 · Feb 17, 2011
Provisional Application 61313208 · Mar 12, 2010
Related Publication 20170098612A1 · Apr 6, 2017