Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation
View Patent ↗A semiconductor wafer contains a plurality of semiconductor die separated by a saw street. An insulating layer is formed over the semiconductor wafer. A protective layer is formed over the insulating layer including an edge of the semiconductor die along the saw street. The protective layer covers an entire surface of the semiconductor wafer. Alternatively, an opening is formed in the protective layer over the saw street. The insulating layer has a non-planar surface and the protective layer has a planar surface. The semiconductor wafer is singulated through the protective layer and saw street to separate the semiconductor die while protecting the edge of the semiconductor die. Leading with the protective layer, the semiconductor die is mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier and protective layer are removed. A build-up interconnect structure is formed over the semiconductor die and encapsulant.
1. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming an insulating layer including a non-planar surface covering an entire surface of the semiconductor die;
forming a protective layer over the semiconductor die and covering the entire surface of the semiconductor die;
removing the protective layer; and
forming an interconnect structure over the semiconductor die.
2. The method of claim 1 , further including depositing an encapsulant over the semiconductor die prior to removing the protective layer.
3. The method of claim 2 , further including forming a first cavity in the encapsulant around the semiconductor die.
4. The method of claim 3 , further including disposing an insulating layer in the first cavity.
5. The method of claim 4 , further including forming a second cavity in the insulating layer over the first cavity.
6. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming a protective layer over the semiconductor die;
depositing an encapsulant over the semiconductor die; and
forming a first cavity in the encapsulant adjacent to the semiconductor die.
7. The method of claim 6 , wherein the protective layer includes a non-planar surface oriented toward the semiconductor die and a planar surface oriented away from the semiconductor die.
8. The method of claim 6 , further including forming an insulating layer including a non-planar surface over the semiconductor die.
9. The method of claim 6 , further including planarizing the encapsulant with a surface of the semiconductor die.
10. The method of claim 6 , further including disposing an insulating layer in the first cavity.
11. The method of claim 10 , further including forming a second cavity in the insulating layer.
12. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming a first insulating layer over the semiconductor die;
forming a protective layer over the first insulating layer;
depositing an encapsulant over the semiconductor die;
forming a first cavity in the encapsulant around the semiconductor die; and
removing the protective layer.
13. The method of claim 12 , further including forming the first insulating layer to include a non-planar surface.
14. The method of claim 13 , wherein the protective layer includes a planar surface.
15. The method of claim 12 , further including forming a second insulating layer in the first cavity.
16. The method of claim 15 , further including forming a second cavity in the second insulating layer.
17. The method of claim 15 , further including forming a conductive layer over the second insulating layer.
18. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming a protective layer including a non-planar surface oriented toward the semiconductor die and a planar surface oriented away from the semiconductor die; and
depositing an encapsulant over the semiconductor die and coplanar with the planar surface of the protective layer.
19. The method of claim 18 , further including forming an insulating layer including a non-planar surface over the semiconductor die.
20. The method of claim 18 , further including planarizing the encapsulant with a surface of the semiconductor die.
21. The method of claim 18 , further including forming a cavity in the encapsulant adjacent to the semiconductor die.
22. The method of claim 21 , further including forming an insulating layer in the cavity.
23. The method of claim 18 , further including forming the protective layer extending completely across the semiconductor die.
24. The method of claim 6 , further including forming a conductive bump over the encapsulant and aligned with the first cavity.
25. The method of claim 24 , further including forming a conductive layer from the semiconductor die to the conductive bump.