Semiconductor device and method of forming a 3D integrated system-in-package module

1. A method of making a semiconductor device, comprising:

providing a first substrate;

forming a conductive pillar on the first substrate;

disposing a semiconductor die on the first substrate;

depositing a first encapsulant over the first substrate and semiconductor die after disposing the semiconductor die on the substrate and after forming the conductive pillar on the first substrate;

providing a second substrate;

disposing a passive device on the second substrate;

depositing a second encapsulant over the second substrate and passive device after disposing the passive device on the second substrate;

mounting the first substrate over the second substrate; and

mounting the first substrate and second substrate to a printed circuit board using a solder material deposited between the conductive pillar and the printed circuit board.

2. The method of claim 1 , further including forming a groove in the first encapsulant around the conductive pillar, wherein the groove exposes a side surface of the conductive pillar.

3. The method of claim 1 , further including forming a shielding layer over the second encapsulant.

4. The method of claim 1 , further including mounting a discrete device over the second substrate opposite the passive device and outside a footprint of the first substrate.

5. A method of making a semiconductor device, comprising:

providing a first substrate;

disposing a semiconductor die over the first substrate;

disposing a vertical interconnect structure over the first substrate;

depositing a first encapsulant over the first substrate, semiconductor die, and vertical interconnect structure;

providing a second substrate;

disposing a passive device over the second substrate;

mounting the first substrate over the second substrate; and

mounting the first substrate and second substrate to a printed circuit board using a solder material disposed between the conductive pillar and printed circuit board.

6. The method of claim 5 , further including removing a portion of the first encapsulant to expose the vertical interconnect structure.

7. The method of claim 6 , wherein the vertical interconnect structure includes a PCB unit.

8. The method of claim 5 , wherein mounting the first substrate over the second substrate includes attaching the first substrate to the second substrate using thermocompression.

9. The method of claim 5 , wherein disposing the semiconductor die over the first substrate includes disposing a semiconductor package comprising the semiconductor die over the first substrate.

10. The method of claim 5 , further including mounting a semiconductor package over the second substrate outside a footprint of the first substrate.

11. The method of claim 5 , further including depositing a second encapsulant over the second substrate and passive device prior to mounting the first substrate over the second substrate.

12. A semiconductor device, comprising:

a first substrate;

a semiconductor die mounted on the first substrate by a conductive bump;

a first encapsulant deposited over the first substrate and semiconductor die;

a second substrate;

a first passive device mounted on the second substrate;

a second encapsulant deposited over the second substrate and first passive device; and

an interconnect structure extending from the first substrate to the second substrate.

13. The semiconductor device of claim 12 , further including a second passive device disposed over the first substrate adjacent to the semiconductor die.

14. The semiconductor device of claim 12 , further including a third encapsulant deposited over the semiconductor die.

15. The semiconductor device of claim 12 , further including a conductive bump disposed over the first substrate adjacent to the semiconductor die and exposed from the encapsulant opposite the first substrate.

16. The semiconductor device of claim 12 , further including a conductive pillar disposed over the first substrate adjacent to the semiconductor die and exposed from the encapsulant opposite the first substrate.

17. The semiconductor device of claim 12 , wherein the interconnect structure includes a plurality of conductive bumps extending from the first substrate to the second substrate.

18. The semiconductor device of claim 12 , further including a shielding layer formed over the first encapsulant.

19. A semiconductor device, comprising:

a first substrate;

a semiconductor die disposed over the first substrate;

a vertical interconnect structure disposed over the first substrate;

an encapsulant deposited over the first substrate, semiconductor die, and vertical interconnect structure;

a second substrate;

a passive device disposed over the second substrate;

an interconnect structure disposed between the first substrate and second substrate; and

a printed circuit board, wherein the first substrate is connected to the PCB through the vertical interconnect structure.

20. The semiconductor device of claim 19 , further including a semiconductor package disposed over the second substrate adjacent to the first substrate.

21. The semiconductor device of claim 19 , further including a PCB unit disposed over the first substrate adjacent to the semiconductor die.

22. The semiconductor device of claim 19 , wherein the interconnect structure includes a plurality of conductive pillars.

23. The semiconductor device of claim 22 , further including a solder layer plated over the plurality of conductive pillars.