IP Library Granted Patent US 10,177,157
Granted Patent B2
US 10,177,157 · App. 15/792,527 · Granted Jan 8, 2019

Transistor structure having multiple n-type and/or p-type elongated regions intersecting under common gate

Inventors: Hui Zang (Guilderland, NY); Min-hwa Chi (San Jose, CA)
Assignee: GLOBALFOUNDRIES INC.
H01L27/1104H01L21/823807H01L21/823821H01L21/823828H01L27/092H01L27/0924
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Quick Facts
Patent No.
US 10,177,157
App. No.
15/792,527
Granted
Jan 8, 2019
Kind
B2
Abstract

A semiconductor structure includes a semiconductor substrate, at least one first elongated region of n-type or p-type, and at least one other second elongated region of the other of n-type or p-type, the first and second elongated regions crossing such that the first elongated region and the second elongated region intersect at a common area, and a shared gate structure over each common area.

Claims (16)

1. A semiconductor structure, comprising:

a semiconductor substrate;

at least one elongated region of one of p-type and n-type;

at least two other elongated regions, wherein the at least two other elongated regions are an opposite type to the at least one elongated region of one of p-type and n-type;

at least one common area comprising an intersection of the at least one elongated region and the at least two other elongated regions; and

a shared gate structure over the at least one common area, wherein the semiconductor structure is configured to act as an inverter;

wherein an added impurities level of the at least one elongated region and the at least two other elongated regions is less in the at least one common area than outside the at least one common area.

2. The semiconductor structure of claim 1 , wherein the at least one elongated region and the at least two other elongated regions are situated in the substrate.

3. The semiconductor structure of claim 1 , further comprising a plurality of semiconductor fins coupled to the substrate, wherein the at least one elongated region and the at least two other elongated regions are situated in a different fin of the plurality of fins.

4. The semiconductor structure of claim 1 , wherein the at least one elongated region has a different width than the at least two other elongated regions.

5. The semiconductor structure of claim 1 , wherein the shared gate structure comprises a dummy gate structure.

6. The semiconductor structure of claim 1 , wherein the shared gate structure comprises a conductive gate structure.

7. The semiconductor structure of claim 6 , wherein the conductive gate structure comprises a single mid-gap work function material.

8. The semiconductor structure of claim 1 , wherein the at least one elongated region comprises one elongated region, wherein the at least two other elongated regions comprise two other elongated regions, and wherein one end of the elongated region and corresponding ends of the two other elongated regions outside the common area are electrically shorted.

9. The semiconductor structure of claim 8 , comprising an array of the semiconductor structures.

10. The semiconductor structure of claim 1 , wherein the at least one elongated region and the at least two other elongated regions comprise epitaxial semiconductor material.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 054633/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2017
From: ZANG, HUI; CHI, MIN-HWA
To: GLOBALFOUNDRIES INC.
Reel/Frame 043940/0111 →
Continuity (2)
Division 14662734 · Mar 19, 2015
Related Publication 20180047734A1 · Feb 15, 2018