Thermally enhanced package to reduce thermal interaction between dies
A method of reducing heat flow between IC chips and the resulting device are provided. Embodiments include attaching plural IC chips to an upper surface of a substrate; forming a lid over the IC chips; and forming a slit through the lid at a boundary between adjacent IC chips.
1. A device comprising:
integrated circuit (IC) chips, comprising a logic chip and at least one memory stack adjacent the logic chip, attached to an upper surface of a substrate;
a lid thermally connected to an upper surface of the IC chips by a first thermal interface material (TIM 1 );
a slit formed through the lid by punch and die at a boundary between the logic chip and each memory stack;
a heat sink thermally connected to the lid by a second thermal interface material (TIM 2 );
at least one co-axial hole formed in the lid and the heat sink; and
a vertical heat pipe extending through each co-axial hole for direct thermal contact with an IC chip and the heat sink.
2. The device according to claim 1 , wherein a length of the vertical heat pipes equals a sum of a thickness of TIM 1 .
3. The device according to claim 2 , wherein a thickness of the lid, a thickness of TIM 2 , and a height of the heat sink, a diameter of each vertical heat pipe ranges from 1 millimeter (mm) to a width of the IC chip with which it is in thermal contact.
4. The device according to claim 3 , wherein the vertical heat pipes have conductivity in only one direction.
5. A device comprising:
integrated circuit (IC) chips, comprising a logic chip and at least one memory stack adjacent the logic chip, attached to an upper surface of a substrate;
a lid thermally connected to an upper surface of the IC chips by a first thermal interface material (TIM 1 );
a slit formed through the lid by punch and die at a boundary between the logic chip and each memory stack; and
a heat sink formed over the lid, the heat sink having vertical pipes penetrating the heat sink and reaching the IC chips and the vertical pipes in direct thermal contact with the IC chips and heat sink,
wherein the vertical heat pipes extend through co-axial holes in the lid and the heat sink.
6. The device according to claim 5 , wherein the vertical heat pipes have conductivity in only one direction.
7. The device according to claim 5 , wherein the vertical heat pipes comprise copper (Cu).