IP Library Granted Patent US 10,483,205
Granted Patent B2
US 10,483,205 · App. 15/901,979 · Granted Nov 19, 2019

Contact using multilayer liner

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Quick Facts
Patent No.
US 10,483,205
App. No.
15/901,979
Granted
Nov 19, 2019
Kind
B2
Abstract

An opening is formed within a substrate made of a silicon material, and a cleaning process is performed; after which, the bottom and walls of the opening are contaminated with oxygen and fluorine particles. A lower blocking layer is formed within the opening, and the lower blocking layer contacts the bottom and walls of the opening. Also, a middle liner layer is formed within the opening, and the middle liner layer contacts the lower blocking layer. Additionally, an upper blocking layer is formed within the opening, and the upper blocking layer contacts the middle liner layer. Further, a conductor layer is formed within the opening, and the conductor layer contacts the upper blocking layer. The lower blocking layer prevents the fluorine particles from affecting the other layers.

Claims (44)

1. A method comprising:

patterning an opening within a substrate of a multi-layer integrated circuit device, said substrate comprising silicon;

performing a cleaning process of the opening;

forming a lower blocking layer within the opening, and the lower blocking layer contacts a surface of the opening, wherein the cleaning process leaves oxygen and fluorine particles within an area of the substrate adjacent the lower blocking layer;

forming a middle liner layer within the opening, and the middle liner layer contacts the lower blocking layer and comprises an oxide;

forming an upper blocking layer within the opening, and the upper blocking layer contacts the middle liner layer, and the middle liner layer is formed to be between the lower blocking layer and the upper blocking layer; and

forming a conductor layer within the opening, and the conductor layer contacts the upper blocking layer and comprises a conductive contact within the multi-layer integrated circuit device.

2. The method according to claim 1 , the lower blocking layer and the upper blocking layer are formed of titanium composite materials, including titanium nitride (TiN), titanium silicide (TiSi), titanium carbide (TiC), and titanium alumide (TiAl)) when the middle liner layer comprises titanium (Ti);

the lower blocking layer and the upper blocking layer are formed of tungsten composite materials including fluorine-free tungsten (FFW), tungsten nitride (WN), and tungsten carbide (WC) when the middle liner layer comprises tungsten (W);

the lower blocking layer and the upper blocking layer are formed of tantalum composite materials including tantalum nitride (TaN) when the middle liner layer comprises tantalum (Ta); and

the lower blocking layer and the upper blocking layer are formed of nickel composite materials including nickel silicide when the middle liner layer comprises nickel (Ni).

3. The method according to claim 1 , the upper blocking layer is formed thicker than the lower blocking layer.

4. The method according to claim 1 , the upper blocking layer is formed at least three times thicker than the lower blocking layer.

5. The method according to claim 1 , the oxide comprises the oxygen scavenged from the surface of the opening.

6. A method comprising:

patterning an opening within a substrate of a multi-layer integrated circuit device, said substrate comprising silicon;

performing a cleaning process of the opening, wherein the cleaning process leaves an amount of contaminants, including oxygen and fluorine particles, on a surface of the opening;

forming a lower blocking layer within the opening;

forming a middle liner layer within the opening, and the middle liner layer contacts the lower blocking layer and comprises an oxide;

forming an upper blocking layer within the opening, and the upper blocking layer contacts the middle liner layer, and the middle liner layer is formed to be between the lower blocking layer and the upper blocking layer; and

forming a conductor layer within the opening, and the conductor layer contacts the upper blocking layer and comprises a conductive contact within the multi-layer integrated circuit device.

7. The method according to claim 6 , the lower blocking layer and the upper blocking layer are formed of titanium composite materials, including titanium nitride (TiN), titanium silicide (TiSi), titanium carbide (TiC), and titanium alumide (TiAl)) when the middle liner layer comprises titanium (Ti);

the lower blocking layer and the upper blocking layer are formed of tungsten composite materials including fluorine-free tungsten (FFW), tungsten nitride (WN), and tungsten carbide (WC) when the middle liner layer comprises tungsten (W);

the lower blocking layer and the upper blocking layer are formed of tantalum composite materials including tantalum nitride (TaN) when the middle liner layer comprises tantalum (Ta); and

the lower blocking layer and the upper blocking layer are formed of nickel composite materials including nickel silicide when the middle liner layer comprises nickel (Ni).

8. The method according to claim 6 , the upper blocking layer is formed thicker than the lower blocking layer.

9. The method according to claim 6 , the upper blocking layer is formed at least three times thicker than the lower blocking layer.

10. The method according to claim 6 , the oxide comprises the oxygen scavenged from the surface of the opening.

11. The method according to claim 6 , wherein the cleaning process leaves oxygen and fluorine particles within an area of the substrate adjacent the lower blocking layer.

12. A method comprising:

patterning an opening within a substrate of a multi-layer integrated circuit device, said substrate comprising silicon;

performing a cleaning process of the opening, wherein the cleaning process comprises simultaneous exposure of the substrate to H 2 , NF 3 and NH 3 plasma by-products, and wherein the cleaning process leaves an amount of contaminants, including oxygen and fluorine particles, on a surface of the opening;

forming a lower blocking layer within the opening, and the lower blocking layer contacts the surface of the opening;

forming a middle liner layer within the opening, and the middle liner layer contacts the lower blocking layer;

forming an upper blocking layer within the opening, and the upper blocking layer contacts the middle liner layer, and the middle liner layer is formed to be between the lower blocking layer and the upper blocking layer; and

forming a conductor layer within the opening, and the conductor layer contacts the upper blocking layer and comprises a conductive contact within the multi-layer integrated circuit device.

13. The method according to claim 12 , the lower blocking layer and the upper blocking layer are formed of titanium composite materials, including titanium nitride (TiN), titanium silicide (TiSi), titanium carbide (TiC), and titanium alumide (TiAl)) when the middle liner layer is titanium (Ti);

the lower blocking layer and the upper blocking layer are formed of tungsten composite materials including fluorine-free tungsten (FFW), tungsten nitride (WN), and tungsten carbide (WC) when the middle liner layer is tungsten (W);

the lower blocking layer and the upper blocking layer are formed of tantalum composite materials including tantalum nitride (TaN) when the middle liner layer is tantalum (Ta); and

the lower blocking layer and the upper blocking layer are formed of nickel composite materials including nickel silicide when the middle liner layer is nickel (Ni).

14. The method according to claim 12 , the upper blocking layer is formed thicker than the lower blocking layer.

15. The method according to claim 12 , the upper blocking layer is formed at least three times thicker than the lower blocking layer.

16. The method according to claim 12 , the middle liner layer comprises an oxide.

17. The method according to claim 16 , the oxide comprises the oxygen scavenged from the surface of the opening.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 054633/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2018
From: KANG, DONGHUN; MAKELA, NEAL A.; PARKS, CHRISTOPHER C.
To: GLOBALFOUNDRIES INC.
Reel/Frame 044999/0804 →