IP Library Granted Patent US 11,557,530
Granted Patent B2
US 11,557,530 · App. 16/903,706 · Granted Jan 17, 2023

Semiconductor devices and methods of making the same

Inventors: Swee Har Khor (Kuala Lumpur, MY); Tian Hing Lim (Selangor, MY); Hui Min Ler (Seremban, MY); Chee Hiong Chew (Seremban, MY); Phillip Celaya (Gilbert, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L23/49513H01L23/49524H01L23/60H01L24/83H01L24/92H01L24/97H01L25/0655H01L25/072H01L25/50H01L21/4828H01L23/3121H01L23/49548H01L23/49562H01L23/49575H01L24/27H01L24/29H01L24/32H01L24/33H01L24/40H01L24/48H01L24/84H01L2224/04026H01L2224/04034H01L2224/04042H01L2224/26175H01L2224/2731H01L2224/2732H01L2224/27312H01L2224/27334H01L2224/291H01L2224/2919H01L2224/29078H01L2224/29191H01L2224/29294H01L2224/32225H01L2224/32245H01L2224/33181H01L2224/40227H01L2224/40247H01L2224/40499H01L2224/48247H01L2224/73263H01L2224/73265H01L2224/83002H01L2224/83191H01L2224/83192H01L2224/83815H01L2224/83855H01L2224/84815H01L2224/84855H01L2224/9221H01L2224/92157H01L2224/92247H01L2224/97H01L2924/00014H01L2924/13091
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Quick Facts
Patent No.
US 11,557,530
App. No.
16/903,706
Granted
Jan 17, 2023
Kind
B2
Abstract

In one embodiment, methods for making semiconductor devices are disclosed.

Claims (28)

1. A method of making a semiconductor device, the method comprising:

applying a non-electrically conductive barrier material to a first portion of a side of a substrate;

after applying the non-electrically conductive barrier material, applying a die attachment material to a second portion of the side of the substrate;

coupling a semiconductor die to the die attachment material; and

impeding movement of the die attachment material away from a footprint of the semiconductor die with the non-electrically conductive barrier material.

2. The method of claim 1 , wherein the footprint of the semiconductor die is larger than a footprint of the non-electrically conductive barrier material.

3. The method of claim 1 , wherein the non-electrically conductive barrier material is one of an organic material, a gel, a wet film, a dry film, an adhesive, or any combination thereof.

4. The method of claim 1 , wherein applying the die attachment material further comprises applying an adhesive film to the substrate to form the non-electrically conductive barrier material on the first portion of the side of the substrate.

5. The method of claim 1 , wherein applying the die attachment material further comprises screen printing an adhesive on the substrate to form the non-electrically conductive barrier material on the first portion of the side of the substrate.

6. The method of claim 1 , wherein applying the die attachment material further comprises one of syringe dispensing, stencil printing, stamping, taping, or film attachment to form the non-electrically conductive barrier material on the first portion of the side of the substrate.

7. The method of claim 1 , wherein applying the die attachment material further comprises curing the non-electrically conductive barrier material on the first portion of the side of the substrate.

8. The method of claim 1 , wherein the substrate is a one of a lead frame, a laminate, a printed circuit board, a ceramic carrier, a tape, a semiconductor wafer, a semiconductor die, a semiconductor package, or any combination thereof.

9. The method of claim 1 , wherein the non-electrically conductive barrier material forms an enclosed shape.

10. The method of claim 1 , wherein the die attachment material is one of an epoxy, a polyimide, a silicone, an organic adhesive, a solder, or any combination thereof.

11. The method of claim 1 , wherein the die attachment material is a one of a gel, a paste, a film, a tape, a solder form, or any combination thereof.

12. The method of claim 1 , wherein the die attachment material is a solder, and wherein coupling a semiconductor die to the die attachment material further comprises reflow soldering the semiconductor die to the second portion of the side of the substrate.

13. A method of making a semiconductor device, the method comprising:

applying a non-electrically conductive barrier material to a first portion of a side of a substrate;

after applying the non-electrically conductive barrier material, applying a die attachment material to an exposed mounting region comprised in a second portion of the side of the substrate;

electrically coupling a contact pad of a semiconductor die to the exposed mounting region through the die attachment material; and

impeding movement of the die attachment material away from a footprint of the semiconductor die with the non-electrically conductive barrier material.

14. The method of claim 13 , wherein the footprint of the semiconductor die is larger than a footprint of the non-electrically conductive barrier material.

15. The method of claim 13 , wherein the non-electrically conductive barrier material is one of an organic material, a gel, a wet film, a dry film, an adhesive, or any combination thereof.

16. The method of claim 13 , wherein applying the die attachment material further comprises applying an adhesive film to the substrate to form the non-electrically conductive barrier material on the first portion of the side of the substrate.

17. The method of claim 13 , wherein applying the die attachment material further comprises screen printing an adhesive on the substrate to form the non-electrically conductive barrier material on the first portion of the side of the substrate.

18. The method of claim 13 , wherein applying the die attachment material further comprises one of syringe dispensing, stencil printing, stamping, taping, or film attachment to form the non-electrically conductive barrier material on the first portion of the side of the substrate.

19. The method of claim 13 , wherein applying the die attachment material further comprises curing the non-electrically conductive barrier material on the first portion of the side of the substrate.

20. The method of claim 13 , wherein the substrate is a one of a lead frame, a laminate, a printed circuit board, a ceramic carrier, a tape, a semiconductor wafer, a semiconductor die, a semiconductor package, or any combination thereof.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 053613, FRAME 0621 Recorded Aug 17, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064618/0942 →
SECURITY INTEREST Recorded Aug 27, 2020
From: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 053613/0621 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2020
From: CELAYA, PHILLIP; LIM, TIAN HING; LER, HUI MIN; CHEW, CHEE HIONG; KHOR, SWEE HAR
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 052962/0576 →
Continuity (2)
Division 14842571 · Sep 1, 2015
Related Publication 20200312749A1 · Oct 1, 2020