Data storage device and method for writing updates to a host memory buffer using assistance from a host
A data storage device and method are disclosed for writing updates to a host memory buffer using assistance from a host. In one embodiment, a data storage device is provided comprising a memory and one or more processors. The one or more processors, individually or in combination, are configured to: write data in a first location in the host memory buffer, wherein the first location is allocated for exclusive use by the data storage device; and write a plurality of updates to the data in a second location in the host memory buffer using one-way traffic on a bus between the data storage device and the host, wherein the second location is allocated for host memory buffer updates. The host is configured to copy the plurality of updates from the second location to the first location. Other embodiments are provided.
1 . A method comprising:
performing in a host comprising a host memory buffer for use by a data storage device:
sending, to the data storage device, a descriptor list identifying locations in the host memory buffer that are allocated for exclusive use by the data storage device, wherein some of the locations are allocated for host memory buffer updates;
receiving, from the data storage device, a plurality of data to be written in locations in the host memory buffer that are allocated for exclusive use by the data storage device but not allocated for host memory buffer updates;
receiving, from the data storage device, a direct memory access (DMA) burst comprising an accumulated plurality of updates to the plurality of data and error correction code for the accumulated plurality of updates to be written in the locations in the host memory buffer that are allocated for host memory buffer updates;
performing a common error correction code check on the accumulated plurality of updates using the generated error correction code; and
copying each update of the plurality of accumulated updates from its location in the host memory buffer to the location in the host memory buffer of the respective data of the plurality of data being updated using a one-by-one host RAM-to-RAM copy operation.
2 . A data storage device comprising:
a memory; and
means for:
receiving, from a host, a descriptor list identifying locations in a host memory buffer in the host that are allocated for exclusive use by the data storage device, wherein some of the locations are allocated for host memory buffer updates;
writing a plurality of data in a locations in the host memory buffer in the host that are allocated for exclusive use by the data storage device but not allocated for host memory buffer updates;
accumulating a plurality of updates to the plurality of data;
generating error correction code for the accumulated plurality of updates; and
writing the accumulated plurality of updates and the generated error correction code using a direct memory access (DMA) burst on a bus between the data storage device and the host to the locations in the host memory buffer that are allocated for host memory buffer updates;
wherein the host is configured to copy each update of the plurality of accumulated updates from its location in the host memory buffer to the location in the host memory buffer of the respective data of the plurality of data being updated using a one-by-one host RAM-to-RAM copy operation after a common error correction code check is performed on the accumulated plurality of updates using the generated error correction code.
3 . A data storage device comprising:
a memory; and
one or more processors, individually or in combination, configured to:
receive, from a host, a descriptor list identifying locations in a host memory buffer in the host that are allocated for exclusive use by the data storage device, wherein some of the locations are allocated for host memory buffer updates;
write a plurality of data in locations in the host memory buffer in the host that are allocated for exclusive use by the data storage device but not allocated for host memory buffer updates;
accumulate a plurality of updates to the plurality of data;
generate error correction code for the accumulated plurality of updates; and
write the accumulated plurality of updates and the generated error correction code using a direct memory access (DMA) burst on a bus between the data storage device and the host to the locations in the host memory buffer that are is allocated for host memory buffer updates;
wherein the host is configured to copy each update of the plurality of accumulated updates from its location in the host memory buffer to the location in the host memory buffer of the respective data of the plurality of data being updated using a one-by-one host RAM-to-RAM copy operation after a common error correction code check is performed on the accumulated plurality of updates using the generated error correction code.
4 . The data storage device of claim 3 , wherein each update of the plurality of updates comprises four bytes.
5 . The data storage device of claim 3 , wherein the plurality of updates is sent to the host without aligning the plurality of updates with an error correction code (ECC) packet.
6 . The data storage device of claim 3 , wherein the memory comprises a three-dimensional memory.