IP Library Patent Application 18763435
Patent Application
App. No. 18/763,435

NON-VOLATILE MEMORY WITH EARLY TERMINATION FOR THRESHOLD VOLTAGE TRACKING

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Quick Facts
Patent No.
US None
App. No.
18/763,435
Abstract

A non-volatile memory stores data in non-volatile memory cells by programming the non-volatile memory cells to a set of data states. Data stored in the non-volatile memory cells is read by sensing for a set of read reference levels for the data states. The read reference levels are adjusted based on performing sense operations at incrementally higher threshold voltages and counting a number of memory cells newly turning on at each sense operation performed until the sooner of a maximum number of sense operations or the count of number of memory cells newly turning on during a current sense operation is greater than the count of number of memory cells newly turning on during a previous sense operation. The system then identifies a valley in the number of memory cells newly turning on and adjusts one or more read reference levels based on the identified valley.

Claims (70)

1 . A non-volatile storage apparatus, comprising:

non-volatile memory cells; and

a control circuit connected to the non-volatile memory cells, the control circuit is configured to store data in the non-volatile memory cells by programming the non-volatile memory cells to a set of data states, the control circuit is configured to read data stored in the non-volatile memory cells by sensing for a set of read reference levels for the data states, the control circuit is further configured to:

perform a first plurality of sense operations for at least a first subset of the non-volatile memory cells at incrementally higher threshold voltages until a first maximum number of sense operations,

count number of non-volatile memory cells newly turning on at each sense operation performed of the first plurality of sense operations,

terminate the performing of the first plurality of sense operations prior to performing the first maximum number of sense operations if the count of number of memory cells newly turning on during a current sense operation of the first plurality of sense operations is greater than the count of number of memory cells newly turning on during a previous sense operation of the first plurality of sense operations,

identify a first valley in the count of number of memory cells newly turning on at each sense operation performed of the first plurality of sense operations, and

adjust read reference levels based on the identified first valley.

2 . The non-volatile storage apparatus of claim 1 , wherein:

the control circuit is configured to terminate the performing of the first plurality of sense operations prior to performing the first maximum number of sense operations if the count of number of memory cells newly turning on during the current sense operation is greater by a predetermined percentage than the count of number of memory cells newly turning on during a previous sense operation.

3 . The non-volatile storage apparatus of claim 2 , wherein:

the control circuit is configured to set the predetermined percentage.

4 . The non-volatile storage apparatus of claim 2 , wherein:

the control circuit is configured to adjust the predetermined percentage.

5 . The non-volatile storage apparatus of claim 2 , wherein:

the control circuit includes a register for storing the predetermined percentage.

6 . The non-volatile storage apparatus of claim 2 , further comprising:

a second subset of the non-volatile memory cells are configured to store the predetermined percentage.

7 . The non-volatile storage apparatus of claim 2 , wherein:

the control circuit is further configured to:

perform a second plurality of sense operations for at least the first subset of the non-volatile memory cells at incrementally higher threshold voltages until a second maximum number of sense operations, the second plurality of sense operations sense for different threshold voltages than the first plurality of sense operations,

count number of non-volatile memory cells newly turning on at each sense operation performed of the second plurality of sense operations,

terminate the performing of the second plurality of sense operations prior to performing the maximum number of sense operations if the count of number of memory cells newly turning on during a current sense operation of the second plurality of sense operations is greater by a predetermined percentage than the count of number of memory cells newly turning on during a previous sense operation of the second plurality of sense operations,

identify a second valley in count of number of memory cells newly turning on at each sense operation performed of the second plurality of sense operations, and

adjust read reference levels based on the identified first valley and the identified second valley.

8 . The non-volatile storage apparatus of claim 1 , wherein:

the control circuit is further configured to:

perform a second plurality of sense operations for at least the first subset of the non-volatile memory cells at incrementally higher threshold voltages until a second maximum number of sense operations, the second plurality of sense operations sense for different threshold voltages than the first plurality of sense operations,

count number of non-volatile memory cells newly turning on at each sense operation performed of the second plurality of sense operations,

terminate the performing of the second plurality of sense operations prior to performing the maximum number of sense operations if the count of number of memory cells newly turning on during a current sense operation of the second plurality of sense operations is greater than the count of number of memory cells newly turning on during a previous sense operation of the second plurality of sense operations,

identify a second valley in count of number of memory cells newly turning on at each sense operation performed of the second plurality of sense operations, and

adjust read reference levels based on the identified first valley and the identified second valley.

9 . The non-volatile storage apparatus of claim 1 , wherein:

the control circuit is configured to terminate the performing of the first plurality of sense operations prior to performing the first maximum number of sense operations if the count of number of memory cells newly turning on during the current sense operation of the first plurality of sense operations is greater than the count of number of memory cells newly turning on during an immediately previous sense operation of the first plurality of sense operations.

10 . The non-volatile storage apparatus of claim 1 , wherein:

the control circuit is configured to terminate the performing of the first plurality of sense operations prior to performing the first maximum number of sense operations if the count of number of memory cells newly turning on during the current sense operation of the first plurality of sense operations is greater by a predetermined percentage than the count of number of memory cells newly turning on during an immediately previous sense operation of the first plurality of sense operations.

11 . The non-volatile storage apparatus of claim 1 , wherein:

each of the data states correspond to threshold voltage distributions; and

each of the read reference levels are read reference voltages between peaks of the threshold voltage distributions.

12 . The non-volatile storage apparatus of claim 1 , further comprising:

a first word line connected to the control circuit and the first subset of non-volatile memory cells, the control circuit is configured to perform the first plurality of sense operations by:

setting a current word line voltage as a previous word line voltage plus an increment value,

applying the current word line voltage to the first word line, and

sensing the first subset of non-volatile memory cells in response to the current word line voltage.

13 . The non-volatile storage apparatus of claim 12 , wherein:

the non-volatile memory cells are arranged as vertical NAND strings in a three dimensional memory structure; and

each of the memory cells of the first subset of non-volatile memory cells are positioned on different NAND strings.

14 . A method, comprising:

(a) setting a current word line voltage as a previous word line voltage plus an increment value;

(b) applying the current word line voltage to a word line connected to a set of non-volatile memory cells;

(c) sensing the non-volatile memory cells in response to the current word line voltage;

(d) determining a current bit count representing a number of memory cells newly turning on in response to the current word line voltage;

(e) determining whether the current bit count is greater than a previous bit count;

(f) in response to determining that the current bit count is not greater than a previous bit count, repeating (a)-(f); and

(g) in response to determining that the current bit count is greater than a previous bit count, identifying a valley in number of memory cells newly turning on based on the current word line voltage and adjusting read reference levels based on the identified valley.

15 . The method of claim 14 , wherein:

the determining whether the current bit count is greater than the previous bit count comprises determining whether the current bit count is greater than the previous bit count by a predetermined percentage.

16 . The method of claim 14 , further comprising:

repeating (a)-(g) for different current word line voltages, the adjusting read reference levels is also based on the identified valley from repeating (a)-(g) for different current word line voltages.

17 . The method of claim 14 , wherein:

the previous bit count is an immediately previous bit count; and

the applying the current word line voltage to the word line connected to the set of non-volatile memory cells causes memory cells of the set of non-volatile memory cells to turn on if the respective memory cells have threshold voltages less than or equal to the current word line voltage.

18 . The method of claim 14 , further comprising:

reading data from the set of non-volatile memory cells using the adjusted read reference levels.

19 . A non-volatile storage apparatus, comprising:

non-volatile memory cells;

means for storing data in the non-volatile memory cells by programming the non-volatile memory cells to a set of data states that can be distinguished by a set of read reference levels for the data states; and

means for adjusting the set of read reference levels based on performing sense operations at incrementally higher threshold voltages and counting a number of memory cells newly turning on at each sense operation performed until the sooner of a maximum number of sense operations or the count of number of memory cells newly turning on during a current sense operation being greater than the count of number of memory cells newly turning on during a previous sense operation.

20 . The non-volatile storage apparatus of claim 19 , wherein:

the means for adjusting is configured to perform sense operations at incrementally higher threshold voltages and count a number of memory cells newly turning on at each sense operation performed until the sooner of a maximum number of sense operations or the count of number of memory cells newly turning on during a current sense operation being greater by a predetermined percentage than the count of number of memory cells newly turning on during a previous sense operation.

Assignments (4)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2024
From: CHEN, ALBERT; ISLAM, SUJJATUL; WADA, MASAAKI; YUAN, JIAHUI
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 067915/0277 →