Managing time-critical commands in a multi-core storage device
A storage device reduces power consumption and processes a first command in a low power mode. The storage device includes a controller to process host commands when the storage device is in a fully active state and to enter a deactivated state when the storage device enters the low power mode. An always-on processor on the storage device enters a sleep state when the storage device enters the low power mode. The always-on processor receives a notification of an incoming host command when the storage device is in the low power mode. When the always-on processor determines that the incoming command is a first command, the always-on processor processes the first command and remains in the sleep state. When the always-on processor determines the incoming command is a second command, the always-on processor may activate the controller to return the storage device to the fully active state.
1 . A storage device for reducing power consumption and processing a first command in a low power mode, the storage device comprising:
a controller configured to process host commands when the storage device is in a fully active state and configured to enter a deactivated state when the storage device enters the low power mode; and
an always-on processor configured to;
enter a sleep state when the storage device enters the low power mode;
receive a notification of an incoming host command when the storage device is in the low power mode;
in response to determining the incoming command is a first command and one of a time sensitive command and a write command with a cyclic redundancy check error, process the first command in the low power mode and remain in the sleep state; and
in response to determining the incoming command is a second command, activate the controller to return the storage device to the fully active state.
2 . The storage device of claim 1 , wherein the always-on processor determines that the incoming command is time sensitive when a timeout value associated with the incoming command is greater than a wakeup time value.
3 . The storage device of claim 2 , wherein the wakeup time value is one of a predefined value and a value that is equivalent to one or more previous activation times for the controller.
4 . The storage device of claim 1 , wherein the always-on processor is configured to move to an active state when it activates the controller.
5 . The storage device of claim 4 , wherein the always-on processor is configured to remain in the active state until the storage device reenters the low power mode, and is further configured to return to the sleep state when the storage device enters the low power mode.
6 . The storage device of claim 1 , wherein processing the first command includes sending a response to the first command to the host.
7 . The storage device of claim 1 , wherein the second command is one of a command with a timeout value that is greater than a wakeup time value and a host write command without a cyclic redundancy check error.
8 . A method for preventing a storage device in a low power mode from timing out on a time sensitive command, the method comprising:
processing, by a controller, host commands when the storage device is in a fully active state;
entering, by the controller a deactivated state when the storage device enters a low power mode;
entering, by an always-on processor, a sleep state when the storage device enters the low power mode;
receiving notifications, by the always-on processor, of incoming host commands when the storage device is in the low power mode;
determining, by the always-on processor, that an incoming command of the incoming host commands is a time sensitive command, and in response, processing the time sensitive command in the low power mode,
remaining, by the always-on processor, in the sleep state after processing the time sensitive command; and
determining, by the always-on processor, that an incoming command of the incoming host commands is a second command and, and in response, activating the controller to return the storage device to the fully active state.
9 . The method of claim 8 , wherein determining that the incoming command is the time sensitive command comprises determining that a timeout value associated with the respective incoming command is greater than a wakeup time value.
10 . The method of claim 9 , wherein the wakeup time value is one of a predefined value and a value that is equivalent to one or more previous activation times for the controller.
11 . The method of claim 8 , further comprising moving, by the always-on processor, to an active state when the always-on processor activates the controller.
12 . The method of claim 11 , further comprising remaining, by the always-on processor, in the active state until the storage device reenters the low power mode and returning, by the always-on processor, to the sleep state.
13 . The method of claim 8 , wherein processing the time sensitive command comprises sending a response to the time sensitive command to a host.
14 . The method of claim 8 , wherein the second command is one of a command with a timeout value that is greater than a wakeup time value and a host write command without a cyclic redundancy check error.
15 . A method for maintaining a storage device in a low power mode after the storage device receives a write command from a host, the method comprising:
processing, by a controller, host commands when the storage device is in a fully active state;
entering, by the controller, a deactivated state when the storage device enters a low power mode;
entering, by an always-on processor, a sleep state when the storage device enters the low power mode;
receiving notifications, by the always-on processor, of incoming host commands when the storage device is in the low power mode;
determining, by the always-on processor, that an incoming command of the incoming host commands is a write command with a cyclic redundancy check error, and in response, processing the write command in the low power mode,
remaining, by the always-on processor, in the sleep state after processing the write command; and
determining, by the always-on processor, that an incoming command of the incoming host commands is a second command, and in response, activating the controller to return the storage device to the fully active state.
16 . The method of claim 15 , wherein processing the write command comprises sending a response to the write command to the host.
17 . The method of claim 15 , wherein the second command is one of a command with a timeout value that is greater than a wakeup time value and a host write command without a cyclic redundancy check error.
18 . The method of claim 15 , wherein determining, by the always-on processor, that the write command includes the cyclic redundancy check error comprises determining if there is the cyclic redundancy check error in a first sector data in the write command.